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LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 6Hqda2Mdy2C40dD/T8YL5+t+awRPcs4XfTyUChhsFhh8CuXMhgA+Vr+PM2fwxEKg6cFn0d2HPbdn3y6UQ8+Duj6PWbfY5+BeWcTu58b2srcC2ufpzOMg+y0l8MVreDhfycV8hTbah6D0ewM/sZJi4dyId4O7q9Oge8uTsLTg4xFJg2dhHmIBHQr9Uxc+D0NQLk+CK0x357HC7/Jke/auV6JIwsbLc4Ayomt0/l5PG6juIz1CXsZOrnjSU9XGi/f/K0S+S58CMNaXi2+VrBRIvnntdOe4KrJ3LSoc9ZElcF5x6WcXt7xcZ2gekOu+BU4EYozxIYcMnGHxk5unT/R6joqkt4jBYa0UBU8ixtqtTwU8/kH3iMkIpqv2By7CSNqTFvLPgKaxa6yNbFqp/f2OlmPbJCF2Ag4dJsoUKzjG7iU= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: b1d275ca-f8d4-40ae-9c9b-08d687975cb6 X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Jan 2019 16:15:46.5610 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1315 X-OriginatorOrg: microchip.com Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Tudor Ambarus The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Signed-off-by: Tudor Ambarus --- v2: - make "pclk" mandatory even for sama5d2. Unnamed clk will be supported in the driver. - drop unneeded example Documentation/devicetree/bindings/spi/atmel-quadspi.txt | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt index e9dae6264d89..f949f9197636 100644 --- a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt +++ b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt @@ -1,14 +1,22 @@ * Atmel Quad Serial Peripheral Interface (QSPI) Required properties: -- compatible: Should be "atmel,sama5d2-qspi". +- compatible: Should be one of the following: + - "atmel,sama5d2-qspi" + - "microchip,sam9x60-qspi" - reg: Should contain the locations and lengths of the base registers and the mapped memory. - reg-names: Should contain the resource reg names: - qspi_base: configuration register address space - qspi_mmap: memory mapped address space - interrupts: Should contain the interrupt for the device. -- clocks: The phandle of the clock needed by the QSPI controller. +- clocks: - "atmel,sama5d2-qspi": the phandle of the clock needed by the + QSPI controller. + - "microchip,sam9x60-qspi": should reference the peripheral + and system QSPI clocks. +- clock-names: Should contain: + - "pclk" for the peripheral clock + - "qspick" for the system clock, when available (sam9x60) - #address-cells: Should be <1>. - #size-cells: Should be <0>.