From patchwork Wed Dec 20 03:23:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 851219 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZEpp+kwv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z1gH03KnTz9ryr for ; Wed, 20 Dec 2017 14:29:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753103AbdLTDYK (ORCPT ); Tue, 19 Dec 2017 22:24:10 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:40392 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752867AbdLTDYH (ORCPT ); Tue, 19 Dec 2017 22:24:07 -0500 Received: by mail-pl0-f67.google.com with SMTP id 62so6813780pld.7; Tue, 19 Dec 2017 19:24:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=ZEpp+kwv1W42/yuNEDJgCmxioWGBhH1QvcsZ6hn0I0srr5VXMXZgld36Ar6dlW8Xgz 28D+JaxSCgoNY6lZ46beNhWpLI+lc0/CM93YYBt1ZDK5ZRnQo78po9zamXLcLvH4YWbY +EKaFx9othbV9aA4N5DeqVIlLkt2o6UvwaDTR/3Qd1RA1w3H3giDYmj/FCThXeXMtXvn xfiyOhUL5xhvLhUX7stG2fJXDxnjG6HxewGIRykr5R8tti8HoPZv1tvFhQ1MTchLca9Y g7GykqWhh1ATEvq/phVmoI9m/o0YCkcScNFhaFisAjdqwZVMJjVeP0Eo7g9kNsTKVUbx 5VRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=IWumlebanWxxb7EjfY4pnz8Xb1IH++huoqkrTt/YZrMrpPnosEg095DLofo75X+fY9 71JcJ572AJU6KDWYwR+nXHi4eYg6pU7nwayQ51vO5P7NSSb36A8tsCxiR9Y3So1VXo32 8vWu+Bjr+YdDCT+xBf2s28kFRQijYeHIqOayaGv1Ym3lcujiJLVoMG/5cPJpsa5cKNi6 zeVHTDiUWReEbREbiLvDUhmjVFapa/csrWcs0RYX6vDx1PtniEaJcO8DWML72Jj7Ustb gJvEypdh5FZFl4xNV1bO1VZzvTiBYDPAjykpn5QqUzO1NiIIKER40WH/F+s4jF+D3BfO knMg== X-Gm-Message-State: AKGB3mLIs15gaueH3i2MjUeKg5bl5AO8HYMLOwnYZj7GsYtgh+GnpZeS IhOmbDtSo58EXjzPHlT2ka4= X-Google-Smtp-Source: ACJfBovzjz27zTgSaTrB6KxDXtjx1i5gitYZD1jagjl6NeuLbrA+VGIdqgi+X3pvw28AJTsYPuOesQ== X-Received: by 10.84.129.193 with SMTP id b59mr5381286plb.361.1513740247105; Tue, 19 Dec 2017 19:24:07 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id t75sm3872443pgc.12.2017.12.19.19.23.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:05 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:53:55 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH v3 02/20] dt-bindings: gpio: Add ASPEED constants Date: Wed, 20 Dec 2017 13:53:10 +1030 Message-Id: <20171220032328.30584-3-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Signed-off-by: Joel Stanley Reviewed-by: Rob Herring --- v3: - Remove dtsi includes from this patch, they will come later --- include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h new file mode 100644 index 000000000000..56fc4889b2c4 --- /dev/null +++ b/include/dt-bindings/gpio/aspeed-gpio.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for binding aspeed,*-gpio. + * + * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H +#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H + +#include + +#define ASPEED_GPIO_PORT_A 0 +#define ASPEED_GPIO_PORT_B 1 +#define ASPEED_GPIO_PORT_C 2 +#define ASPEED_GPIO_PORT_D 3 +#define ASPEED_GPIO_PORT_E 4 +#define ASPEED_GPIO_PORT_F 5 +#define ASPEED_GPIO_PORT_G 6 +#define ASPEED_GPIO_PORT_H 7 +#define ASPEED_GPIO_PORT_I 8 +#define ASPEED_GPIO_PORT_J 9 +#define ASPEED_GPIO_PORT_K 10 +#define ASPEED_GPIO_PORT_L 11 +#define ASPEED_GPIO_PORT_M 12 +#define ASPEED_GPIO_PORT_N 13 +#define ASPEED_GPIO_PORT_O 14 +#define ASPEED_GPIO_PORT_P 15 +#define ASPEED_GPIO_PORT_Q 16 +#define ASPEED_GPIO_PORT_R 17 +#define ASPEED_GPIO_PORT_S 18 +#define ASPEED_GPIO_PORT_T 19 +#define ASPEED_GPIO_PORT_U 20 +#define ASPEED_GPIO_PORT_V 21 +#define ASPEED_GPIO_PORT_W 22 +#define ASPEED_GPIO_PORT_X 23 +#define ASPEED_GPIO_PORT_Y 24 +#define ASPEED_GPIO_PORT_Z 25 +#define ASPEED_GPIO_PORT_AA 26 +#define ASPEED_GPIO_PORT_AB 27 +#define ASPEED_GPIO_PORT_AC 28 + +#define ASPEED_GPIO(port, offset) \ + ((ASPEED_GPIO_PORT_##port * 8) + offset) + +#endif