| Message ID | 20171128152643.20463-5-alexandre.belloni@free-electrons.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | MIPS: add support for the Microsemi MIPS SoCs | expand |
On Tue, Nov 28, 2017 at 04:26:34PM +0100, Alexandre Belloni wrote: > Add the documentation for the Microsemi Ocelot pinmuxing and gpio > controller. > > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > Cc: Rob Herring <robh+dt@kernel.org> > Cc: devicetree@vger.kernel.org > To: Linus Walleij <linus.walleij@linaro.org> > Cc: linux-gpio@vger.kernel.org > > .../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 39 ++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt Acked-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt new file mode 100644 index 000000000000..24a210e0c59a --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt @@ -0,0 +1,39 @@ +Microsemi Ocelot pin controller Device Tree Bindings +---------------------------------------------------- + +Required properties: + - compatible : Should be "mscc,ocelot-pinctrl" + - reg : Address and length of the register set for the device + - gpio-controller : Indicates this device is a GPIO controller + - #gpio-cells : Must be 2. + The first cell is the pin number and the + second cell specifies GPIO flags, as defined in + <dt-bindings/gpio/gpio.h>. + - gpio-ranges : Range of pins managed by the GPIO controller. + + +The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin +configuration documented in pinctrl-bindings.txt. + +The following generic properties are supported: + - function + - pins + +Example: + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + reg = <0x71070034 0x28>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + + uart_pins: uart-pins { + pins = "GPIO_6", "GPIO_7"; + function = "uart"; + }; + + uart2_pins: uart2-pins { + pins = "GPIO_12", "GPIO_13"; + function = "uart2"; + }; + };
Add the documentation for the Microsemi Ocelot pinmuxing and gpio controller. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> --- Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org To: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org .../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt