From patchwork Wed Nov 8 21:24:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 836006 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="yen5hMJk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yXKCV5Jnrz9rxl for ; Thu, 9 Nov 2017 08:28:06 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752718AbdKHV2E (ORCPT ); Wed, 8 Nov 2017 16:28:04 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:38990 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752908AbdKHVZ7 (ORCPT ); Wed, 8 Nov 2017 16:25:59 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vA8LP6TL009249; Wed, 8 Nov 2017 15:25:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1510176306; bh=Fl+9TSoxhx5YEQYhHxel85EOCX9XYhErWvGNTIfWaQE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yen5hMJkqRTmxQCYYZgJv4BpNu5S6nTxLPsQ7z8KS5DyvZV4H+xFnNMHu0uJdD7+g TSk2UR94+aTO4HAS/q4v2Nw0kb0DunpRCMOltWM2wOFE6nHp/6cvhLe33I2gid6gfM Y4J0uIoa+wAuK3zQtU16GJ1ZKe9YyOYusjAHCd4A= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8LP67c018345; Wed, 8 Nov 2017 15:25:06 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 8 Nov 2017 15:25:06 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 8 Nov 2017 15:25:06 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8LP526026486; Wed, 8 Nov 2017 15:25:05 -0600 Received: from localhost (uda0226330.dhcp.ti.com [128.247.59.224]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id vA8LP5322936; Wed, 8 Nov 2017 15:25:05 -0600 (CST) From: "Andrew F. Davis" To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Shawn Guo , Sascha Hauer CC: , , , "Andrew F . Davis" Subject: [PATCH 2/9] ASoC: tlv320aic3x: Fix typo in DT binding documentation Date: Wed, 8 Nov 2017 15:24:58 -0600 Message-ID: <20171108212505.28320-3-afd@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171108212505.28320-1-afd@ti.com> References: <20171108212505.28320-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The property used to specify a GPIO intended for reset is "reset-gpio", this binding uses "gpio-reset", as almost all other bindings use the former name this use of the latter is certainly not intended and was a typo. It is not compatible with newer methods used to fetch GPIO pins and to prevent the spread of this error to other bindings lets fix this here. We also standardize the pin as active-low, different device trees have marked the GPIO different ways, luckily the driver currently uses the low-level GPIO set function which does not respect the active-low flag, but future changes may change this. This is an active-low reset, mark it as such. Lastly, add an example of use for this property. Fixes: c24fdc886fde ("ASoC: tlv320aic3x: Add device tree bindings") Signed-off-by: Andrew F. Davis --- Documentation/devicetree/bindings/sound/tlv320aic3x.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt index ba5b45c483f5..9e8eaa08ce90 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt @@ -17,7 +17,7 @@ Required properties: Optional properties: -- gpio-reset - gpio pin number used for codec reset +- reset-gpio - GPIO specification for the active low RESET input. - ai3x-gpio-func - - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality - Not supported on tlv320aic3104 - ai3x-micbias-vg - MicBias Voltage required. @@ -61,10 +61,14 @@ The pins can be used in referring sound node's audio-routing property. Example: +#include + tlv320aic3x: tlv320aic3x@1b { compatible = "ti,tlv320aic3x"; reg = <0x1b>; + reset-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + AVDD-supply = <®ulator>; IOVDD-supply = <®ulator>; DRVDD-supply = <®ulator>;