From patchwork Wed Nov 8 21:24:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 836005 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="BAwfBNR1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yXKC36HR7z9s7F for ; Thu, 9 Nov 2017 08:27:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752660AbdKHV1B (ORCPT ); Wed, 8 Nov 2017 16:27:01 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:12402 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752833AbdKHVZ7 (ORCPT ); Wed, 8 Nov 2017 16:25:59 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vA8LP5WE013901; Wed, 8 Nov 2017 15:25:05 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1510176305; bh=YdGaYs+tFx0lvNhMkRcHglKW+wwrGawMWWXD4smoFwQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BAwfBNR1TR1wgg3EcVLOPmxw+QUiWGy+wOPpquAsmMUGq5zU1uA4dBrfZevxLrQ4f ipzY7K5tBXUtpeyxcl8SiXCFU+jWHrZ+Gf6nqaTeRTemww+URcJUEC+jX0zRMKbRF7 g9zE+4n4TnQ+/s8l5xiRvz5oruMJWWLGNGNRv+8w= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8LP5Q6003465; Wed, 8 Nov 2017 15:25:05 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 8 Nov 2017 15:25:05 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 8 Nov 2017 15:25:05 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8LP5cP002052; Wed, 8 Nov 2017 15:25:05 -0600 Received: from localhost (uda0226330.dhcp.ti.com [128.247.59.224]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id vA8LP5322931; Wed, 8 Nov 2017 15:25:05 -0600 (CST) From: "Andrew F. Davis" To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Shawn Guo , Sascha Hauer CC: , , , "Andrew F . Davis" Subject: [PATCH 1/9] ASoC: tlv320aic31xx: Fix typo in DT binding documentation Date: Wed, 8 Nov 2017 15:24:57 -0600 Message-ID: <20171108212505.28320-2-afd@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171108212505.28320-1-afd@ti.com> References: <20171108212505.28320-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The property used to specify a GPIO intended for reset is "reset-gpio", this binding uses "gpio-reset", as almost all other bindings use the former name this use of the latter is certainly not intended and was a typo. It is not compatible with newer methods used to fetch GPIO pins and to prevent the spread of this error to other bindings lets fix this here. We also standardize the pin as active-low, different device trees have marked the GPIO different ways, luckily the driver currently uses the low-level GPIO set function which does not respect the active-low flag, but future changes may change this. This is an active-low reset, mark it as such. Lastly, add an example of use for this property. Fixes: e00447fafbf7 ("ASoC: tlv320aic31xx: Add basic codec driver implementation") Signed-off-by: Andrew F. Davis --- Documentation/devicetree/bindings/sound/tlv320aic31xx.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt index 6fbba562eaa7..4c4e77f97d87 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt @@ -22,7 +22,7 @@ Required properties: Optional properties: -- gpio-reset - gpio pin number used for codec reset +- reset-gpio - GPIO specification for the active low RESET input. - ai31xx-micbias-vg - MicBias Voltage setting 1 or MICBIAS_2_0V - MICBIAS output is powered to 2.0V 2 or MICBIAS_2_5V - MICBIAS output is powered to 2.5V @@ -48,6 +48,7 @@ CODEC input pins: The pins can be used in referring sound node's audio-routing property. Example: +#include #include tlv320aic31xx: tlv320aic31xx@18 { @@ -56,6 +57,8 @@ tlv320aic31xx: tlv320aic31xx@18 { ai31xx-micbias-vg = ; + reset-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>; + HPVDD-supply = <®ulator>; SPRVDD-supply = <®ulator>; SPLVDD-supply = <®ulator>;