From patchwork Mon Jun 19 03:36:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 777547 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wrcBW0Wtzz9s65 for ; Mon, 19 Jun 2017 13:38:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751998AbdFSDhc (ORCPT ); Sun, 18 Jun 2017 23:37:32 -0400 Received: from mx2.suse.de ([195.135.220.15]:55285 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751758AbdFSDhc (ORCPT ); Sun, 18 Jun 2017 23:37:32 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 50EA0ABCA; Mon, 19 Jun 2017 03:37:30 +0000 (UTC) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-arm-kernel@lists.infradead.org Cc: mp-cs@actions-semi.com, Thomas Liau , =?UTF-8?q?=E5=BC=A0=E4=B8=9C=E9=A3=8E?= , =?UTF-8?q?=E5=88=98=E7=82=9C?= , =?UTF-8?q?=E5=BC=A0=E5=A4=A9=E7=9B=8A?= , 96boards@ucrobotics.com, support@lemaker.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v5 20/26] dt-bindings: power: Add Owl SPS power domains Date: Mon, 19 Jun 2017 05:36:25 +0200 Message-Id: <20170619033626.5583-1-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170606005426.26446-23-afaerber@suse.de> References: <20170606005426.26446-23-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define power domains for all non-reserved S500 power gates. Acked-by: Rob Herring Signed-off-by: Andreas Färber --- v4 -> v5: * Renamed header file with owl- prefix for uniqueness v3 -> v4: Unchanged v3: new .../devicetree/bindings/power/actions,owl-sps.txt | 17 +++++++++++++++++ include/dt-bindings/power/owl-s500-powergate.h | 19 +++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/actions,owl-sps.txt create mode 100644 include/dt-bindings/power/owl-s500-powergate.h diff --git a/Documentation/devicetree/bindings/power/actions,owl-sps.txt b/Documentation/devicetree/bindings/power/actions,owl-sps.txt new file mode 100644 index 000000000000..007b9a7ae723 --- /dev/null +++ b/Documentation/devicetree/bindings/power/actions,owl-sps.txt @@ -0,0 +1,17 @@ +Actions Semi Owl Smart Power System (SPS) + +Required properties: +- compatible : "actions,s500-sps" for S500 +- reg : Offset and length of the register set for the device. +- #power-domain-cells : Must be 1. + See macros in: + include/dt-bindings/power/owl-s500-powergate.h for S500 + + +Example: + + sps: power-controller@b01b0100 { + compatible = "actions,s500-sps"; + reg = <0xb01b0100 0x100>; + #power-domain-cells = <1>; + }; diff --git a/include/dt-bindings/power/owl-s500-powergate.h b/include/dt-bindings/power/owl-s500-powergate.h new file mode 100644 index 000000000000..0a1c451865ea --- /dev/null +++ b/include/dt-bindings/power/owl-s500-powergate.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ +#ifndef DT_BINDINGS_POWER_OWL_S500_POWERGATE_H +#define DT_BINDINGS_POWER_OWL_S500_POWERGATE_H + +#define S500_PD_VDE 0 +#define S500_PD_VCE_SI 1 +#define S500_PD_USB2_1 2 +#define S500_PD_CPU2 3 +#define S500_PD_CPU3 4 +#define S500_PD_DMA 5 +#define S500_PD_DS 6 +#define S500_PD_USB3 7 +#define S500_PD_USB2_0 8 + +#endif