From patchwork Wed Dec 18 07:20:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 1212005 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47d61c2Sb4z9sRv for ; Wed, 18 Dec 2019 18:23:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726725AbfLRHXV (ORCPT ); Wed, 18 Dec 2019 02:23:21 -0500 Received: from inva021.nxp.com ([92.121.34.21]:36136 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726674AbfLRHXV (ORCPT ); Wed, 18 Dec 2019 02:23:21 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2FE53200A58; Wed, 18 Dec 2019 08:23:19 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E9B22200184; Wed, 18 Dec 2019 08:23:11 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E2018402F3; Wed, 18 Dec 2019 15:23:02 +0800 (SGT) From: Joakim Zhang To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, shengjiu.wang@nxp.com Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, fugang.duan@nxp.com, aisheng.dong@nxp.com, Joakim Zhang Subject: [PATCH 1/3] dt-bindings/irq: add binding for NXP INTMUX interrupt multiplexer Date: Wed, 18 Dec 2019 15:20:13 +0800 Message-Id: <1576653615-27954-2-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576653615-27954-1-git-send-email-qiangqing.zhang@nxp.com> References: <1576653615-27954-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer found in the i.MX8 family SoCs. Signed-off-by: Joakim Zhang --- .../interrupt-controller/fsl,intmux.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt new file mode 100644 index 000000000000..be3c6848f36c --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt @@ -0,0 +1,34 @@ +Freescale INTMUX interrupt multiplexer + +Required properties: + +- compatible: Should be: + - "fsl,imx-intmux" +- reg: Physical base address and size of registers. +- interrupts: Should contain the parent interrupt lines (up to 8) used to + multiplex the input interrupts. +- clocks: Should contain one clock for entry in clock-names. +- clock-names: + - "ipg": main logic clock +- interrupt-controller: Identifies the node as an interrupt controller. +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value must be 1. + +Optional properties: + +- fsl,intmux_chans: The number of channels used for interrupt source. The + Maximum value is 8. + +Example: + + intmux@37400000 { + compatible = "fsl,imx-intmux"; + reg = <0x37400000 0x1000>; + interrupts = ; + clocks = <&clk IMX8QM_CM40_IPG_CLK>; + clock-names = "ipg"; + interrupt-controller; + #interrupt-cells = <1>; + fsl,intmux_chans = <1>; + }; +