From patchwork Mon Jan 8 02:17:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 856651 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=lechnology.com header.i=@lechnology.com header.b="JqIYE059"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zFJsp1hwlz9s7h for ; Mon, 8 Jan 2018 13:21:02 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755179AbeAHCS5 (ORCPT ); Sun, 7 Jan 2018 21:18:57 -0500 Received: from vern.gendns.com ([206.190.152.46]:51059 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754998AbeAHCSw (ORCPT ); Sun, 7 Jan 2018 21:18:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=RdM6gW7w7COmD9NX+HOZzvdnedYJn1tAgvq6upUKK1o=; b=JqIYE059befmK3QnSEST7pXNB qkP0wbBO9OrcFHMPpk0xY7/g1Xt9ADjxENJJvCp00gKbfwG2vT2ijgpOG4xCpcLFQWKvYR04iN4EY hg39+kQid38aGcpkoSYoPvEivkyt3s5DLFui+9PkG9sBxZM5296XuHsbJ8kLxyEE/CaCR+qNAcT2D Kjm6gY43hMTgSVSmEYKo5b6DXDkEHuBBUf9/rLqqxwhpmpr4OamaNvaX7DIRc13HOjbG/odSv/a/4 d4g/GHI5AlS4tPWIh1blL2LUV1ySaHFrkezcnfJmIorTScoucs8R5EUELbYID1pSmZ/Ana3qNyUnw 8Bwd3clUA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:53904 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-SHA256:128) (Exim 4.89) (envelope-from ) id 1eYN1O-0009GR-WF; Sun, 07 Jan 2018 21:18:43 -0500 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v5 20/44] dt-bindings: clock: Add bindings for TI DA8XX USB PHY clocks Date: Sun, 7 Jan 2018 20:17:19 -0600 Message-Id: <1515377863-20358-21-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515377863-20358-1-git-send-email-david@lechnology.com> References: <1515377863-20358-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part of a syscon register called CFGCHIP3. Signed-off-by: David Lechner --- .../clock/ti/davinci/da8xx-cfgchip-usb-phy.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt diff --git a/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt b/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt new file mode 100644 index 0000000..8a12e1b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt @@ -0,0 +1,55 @@ +Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP USB PHY clocks + +TI DA8XX/OMAP-L13X/AM17XX/AM18XX SoCs contain a general purpose set of +registers call CFGCHIPn. Some of these registers function as the USB PHY +clocks. This document describes the bindings for those clocks. + +Required properties: +- compatible: shall be one of: + - "ti,da830-usb0-phy-clock" for the USB 2.0 PHY + - "ti,da830-usb1-phy-clock" for the USB 1.1 PHY +- #clock-cells: from common clock binding; shall be set to 0. +- clocks: phandle list of clocks corresponding to clock-names +- clock-names: depends on compatible: + - for "ti,da830-usb0-phy-clock" must be "usb_refclkin", "auxclk", + "usb0_lpsc" + - for "ti,da830-usb1-phy-clock" must be "usb0_phy", "usb_refclkin" + +Optional properties: +- clock-output-names: from common clock binding. + +Parent: + This node must be a child of a "ti,da830-cfgchip" node. + +Assignment: + The assigned-clocks and assigned-clock-parents properties from the + common clock bindings can be used to indicate which parent clock should + be used. Note: for "ti,da830-usb0-phy-clock", only "usb_refclkin" or + "auxclk" can be used as the assigned parent clock ("usb0_lpsc" is not + an actual parent clock and only used internally). + +Examples: + + cfgchip: syscon@1417c { + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; + reg = <0x1417c 0x14>; + + usb0_phy_clk: usb0-phy-clock { + compatible = "ti,da830-usb0-phy-clock"; + #clock-cells = <0>; + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; + clock-output-names = "usb0_phy_clk"; + }; + + usb1_phy_clk: usb1-phy-clock { + compatible = "ti,da830-usb1-phy-clock"; + #clock-cells = <0>; + clocks = <&usb0_phy_clk>, <&usb_refclkin>; + clock-names = "usb0_phy", "usb_refclkin"; + clock-output-names = "usb1_phy_clk"; + }; + }; + +Also see: +- Documentation/devicetree/bindings/clock/clock-bindings.txt