From patchwork Wed Dec 27 16:27:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthikeyan Ramasubramanian X-Patchwork-Id: 853203 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="Ek0afMwn"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="YbazIajK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z6JDd5JDSz9s9Y for ; Thu, 28 Dec 2017 03:28:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752052AbdL0Q17 (ORCPT ); Wed, 27 Dec 2017 11:27:59 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:53234 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751184AbdL0Q1z (ORCPT ); Wed, 27 Dec 2017 11:27:55 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1815460B3B; Wed, 27 Dec 2017 16:27:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514392074; bh=H8NLEJur5NOksIG9wOWCdCuxb55b6UQzFmu0DqkLkbk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ek0afMwnTHSOoA5dqRHD5gefu3lMluuKILQdHm9pQOzw/jkoFUL9Nt0qx/T5FyFK3 DKFr6K46dMH1EsS3euHwKDjVNzXZ07OuvIvY+ZkJv9zsfuXRatRtXAQtby1vsQKGUK QT6dJdHEmPjjwGtDzAUTrZlv1LvzRaTRu5yjyAKs= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: kramasub@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D2A3960B1F; Wed, 27 Dec 2017 16:27:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514392071; bh=H8NLEJur5NOksIG9wOWCdCuxb55b6UQzFmu0DqkLkbk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YbazIajKNihzClv9lqrScM+StSLDSwHU7ui9GyQmeWR1hmeBEJ8VAa/wTnSDk9OQA mCqRryVN/4uiIF+Oi3+y2cTxbqpB00d58hTE6NKwIL0JTvaSnBqeapBcKKkqCOR93i riGAlpyD/J3rpyQmzFaswfpIo+60k/sWFC2VoDj4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D2A3960B1F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=kramasub@codeaurora.org From: Karthikeyan Ramasubramanian To: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org Cc: Karthikeyan Ramasubramanian , linux-doc@vger.kernel.org, devicetree@vger.kernel.org, andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, corbet@lwn.net, wsa@the-dreams.de, gregkh@linuxfoundation.org, jslaby@suse.com, Girish Mahadevan Subject: [PATCH RFC 6/7] serial: Add device tree bindings for GENI based UART Controller Date: Wed, 27 Dec 2017 09:27:25 -0700 Message-Id: <1514392046-30602-7-git-send-email-kramasub@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1514392046-30602-1-git-send-email-kramasub@codeaurora.org> References: <1514392046-30602-1-git-send-email-kramasub@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding support for GENI based UART Controller in the QUP Wrapper. Signed-off-by: Karthikeyan Ramasubramanian Signed-off-by: Girish Mahadevan --- .../devicetree/bindings/serial/qcom,geni-uart.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/qcom,geni-uart.txt diff --git a/Documentation/devicetree/bindings/serial/qcom,geni-uart.txt b/Documentation/devicetree/bindings/serial/qcom,geni-uart.txt new file mode 100644 index 0000000..e60ec6a --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,geni-uart.txt @@ -0,0 +1,31 @@ +Qualcomm Technologies Inc. GENI based Serial UART Controller driver + +This serial UART driver supports console use-cases. This driver is meant +only for Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) +cores and isn't backwards compatible. + +Required properties: +- compatible: should contain "qcom,geni-uart, qcom,geni-console" +- reg: Should contain UART register location and length. +- interrupts: Should contain UART core interrupts. +- clocks: clocks needed for UART, includes the core and AHB clock. +- pinctrl-names/pinctrl-0/1: The GPIOs assigned to this core. The names + Should be "active" and "sleep" for the pin confuguration when core is active + or when entering sleep state. +- qcom,wrapper-core: Wrapper QUP core containing this UART controller. + +Example: +qup_uart11: qcom,qup_uart@0xa88000 { + compatible = "qcom,geni-uart"; + reg = <0xa88000 0x7000>; + reg-names = "se_phys"; + clock-names = "se-clk", "m-ahb", "s-ahb"; + clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qup_1_uart_3_active>; + pinctrl-1 = <&qup_1_uart_3_sleep>; + interrupts = <0 355 0>; + qcom,wrapper-core = <&qup_0>; +};