From patchwork Wed Dec 27 16:27:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthikeyan Ramasubramanian X-Patchwork-Id: 853204 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="dOitCN3E"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="joyT2L8+"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z6JDz4LFGz9s7M for ; Thu, 28 Dec 2017 03:28:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752023AbdL0Q15 (ORCPT ); Wed, 27 Dec 2017 11:27:57 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:53218 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752016AbdL0Q1y (ORCPT ); Wed, 27 Dec 2017 11:27:54 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9D8B360B1E; Wed, 27 Dec 2017 16:27:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514392073; bh=VL5F4meTwUCCff0prKgB906y7hKrQbQn+q0tQ1BVVmc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dOitCN3ENGBmlsuuS+Q8n7eoaJ0fC60tbYP7FROsU5dbFFLHgW1kLt8Cz6QdQGLpy qpToE7hUh4J997i3/6MKJpEUKhiQ6sMHDcDatVrB/LIBzTTHU4CPCkjdBoUO7N4sQy QcleuTsJhyZi2kcFz6F0BM6YqsU0vS4eLs1i/Jlg= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: kramasub@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 26ED860B0E; Wed, 27 Dec 2017 16:27:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514392068; bh=VL5F4meTwUCCff0prKgB906y7hKrQbQn+q0tQ1BVVmc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=joyT2L8+RwTZ6XHqk27vwh3Mme267fXfqJdiyqZ5fIEeCDaXmNJCrA6L9gVH0q93c q5xXH8OF+C45mE8+Gj4qStrqMlTeh0NWVrfPbSe/V+V8u/1HUd2sKhW9A4qJPOmEXR 0t9nqqJmuAwbMctT+ZljJSv6afTzD7iW1OxBQkhk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 26ED860B0E Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=kramasub@codeaurora.org From: Karthikeyan Ramasubramanian To: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org Cc: Karthikeyan Ramasubramanian , linux-doc@vger.kernel.org, devicetree@vger.kernel.org, andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, corbet@lwn.net, wsa@the-dreams.de, gregkh@linuxfoundation.org, jslaby@suse.com, Sagar Dharia Subject: [PATCH RFC 4/7] i2c: Add device tree bindings for GENI I2C Controller Date: Wed, 27 Dec 2017 09:27:23 -0700 Message-Id: <1514392046-30602-5-git-send-email-kramasub@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1514392046-30602-1-git-send-email-kramasub@codeaurora.org> References: <1514392046-30602-1-git-send-email-kramasub@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding support for I2C Controller in GENI based QUP Wrapper. Signed-off-by: Sagar Dharia Signed-off-by: Karthikeyan Ramasubramanian --- .../devicetree/bindings/i2c/i2c-qcom-geni.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt new file mode 100644 index 0000000..d2fa9ce --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-geni.txt @@ -0,0 +1,39 @@ +Qualcomm Technologies Inc. GENI based I2C Controller driver + +Required properties: + - compatible: Should be: + * "qcom,i2c-geni. + - reg: Should contain QUP register address and length. + - interrupts: Should contain I2C interrupt. + - clocks: Serial engine core clock, and AHB clocks needed by the device. + - pinctrl-names/pinctrl-0/1: The GPIOs assigned to this core. The names + should be "active" and "sleep" for the pin confuguration when core is active + or when entering sleep state. + - #address-cells: Should be <1> Address cells for i2c device address + - #size-cells: Should be <0> as i2c addresses have no size component + - qcom,wrapper-core: Wrapper QUP core containing this I2C controller. + +Optional property: + - qcom,clk-freq-out : Desired I2C bus clock frequency in Hz. + When missing default to 400000Hz. + +Child nodes should conform to i2c bus binding. + +Example: + +i2c@a94000 { + compatible = "qcom,i2c-geni"; + reg = <0xa94000 0x4000>; + interrupts = ; + clock-names = "se-clk", "m-ahb", "s-ahb"; + clocks = <&clock_gcc GCC_QUPV3_WRAP0_S5_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qup_1_i2c_5_active>; + pinctrl-1 = <&qup_1_i2c_5_sleep>; + #address-cells = <1>; + #size-cells = <0>; + qcom,wrapper-core = <&qup_0>; + qcom,clk-freq-out = <400000>; +};