From patchwork Wed Oct 11 11:23:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Lothar_Wa=C3=9Fmann?= X-Patchwork-Id: 824353 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yBsYS481Hz9sPt for ; Wed, 11 Oct 2017 22:43:08 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756981AbdJKLnG (ORCPT ); Wed, 11 Oct 2017 07:43:06 -0400 Received: from smtprelay05.ispgateway.de ([80.67.31.99]:11451 "EHLO smtprelay05.ispgateway.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751945AbdJKLnE (ORCPT ); Wed, 11 Oct 2017 07:43:04 -0400 Received: from [89.1.81.74] (helo=ipc1.ka-ro) by smtprelay05.ispgateway.de with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89) (envelope-from ) id 1e2FPi-0004jQ-6Z; Wed, 11 Oct 2017 13:43:02 +0200 Received: from lothar by ipc1.ka-ro with local (Exim 4.84_2 #2 (Debian)) id 1e2FPh-0007uB-Ob; Wed, 11 Oct 2017 13:43:01 +0200 From: =?utf-8?q?Lothar_Wa=C3=9Fmann?= To: David Airlie , Mark Rutland , Rob Herring , Thierry Reding , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Lothar_Wa=C3=9Fmann?= Subject: [PATCH 4/9] drm/panel: simple: add support for overriding the pixel clock polarity Date: Wed, 11 Oct 2017 13:23:36 +0200 Message-Id: <1507721021-28174-5-git-send-email-LW@KARO-electronics.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1507721021-28174-1-git-send-email-LW@KARO-electronics.de> References: <1507721021-28174-1-git-send-email-LW@KARO-electronics.de> MIME-Version: 1.0 X-Df-Sender: bHdAa2Fyby1lbGVjdHJvbmljcy5kZQ== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Ka-Ro electronics MB7 baseboard has an on-board LCD->LVDS converter that requires a fixed pixelclk polarity, no matter what the panel's display_mode specifies. Add an option to override the pixelclk polarity defined in the panel's display_mode via DTB. Signed-off-by: Lothar Waßmann --- .../bindings/display/panel/simple-panel.txt | 3 +++ drivers/gpu/drm/panel/panel-simple.c | 30 ++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/simple-panel.txt b/Documentation/devicetree/bindings/display/panel/simple-panel.txt index e2308c3..dcaf9a7 100644 --- a/Documentation/devicetree/bindings/display/panel/simple-panel.txt +++ b/Documentation/devicetree/bindings/display/panel/simple-panel.txt @@ -9,6 +9,9 @@ Optional properties: - backlight: phandle of the backlight device attached to the panel - bus-format-override: override the bus_format setting of the panel's display_mode settings +- pixelclk-active: override the pixelclock polarity defined in the + panel's display_mode settings + Example: diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f356a7b..7bbb752 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -89,6 +89,12 @@ struct panel_simple { struct gpio_desc *enable_gpio; u32 bus_fmt_override; + u32 quirks; +}; + +enum { + PANEL_QUIRK_PIXDATA_NEGEDGE = BIT(0), + PANEL_QUIRK_PIXDATA_POSEDGE = BIT(1), }; #define SP_DISPLAY_MODE(freq, ha, hfp, hs, hbp, va, vfp, vs, vbp, vr, flgs) { \ @@ -110,6 +116,15 @@ static inline struct panel_simple *to_panel_simple(struct drm_panel *panel) return container_of(panel, struct panel_simple, base); } +static inline void panel_simple_apply_quirks(struct panel_simple *panel, + struct drm_display_info *info) +{ + if (panel->quirks & PANEL_QUIRK_PIXDATA_NEGEDGE) + info->bus_flags |= DRM_BUS_FLAG_PIXDATA_NEGEDGE; + if (panel->quirks & PANEL_QUIRK_PIXDATA_POSEDGE) + info->bus_flags |= DRM_BUS_FLAG_PIXDATA_POSEDGE; +} + static int panel_simple_get_fixed_modes(struct panel_simple *panel) { struct drm_connector *connector = panel->base.connector; @@ -175,6 +190,8 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); connector->display_info.bus_flags = panel->desc->bus_flags; + if (panel->quirks) + panel_simple_apply_quirks(panel, &connector->display_info); return num; } @@ -308,6 +325,7 @@ static inline int panel_simple_check_quirks(struct device *dev, struct panel_simple *p) { const char *bus_fmt; + u32 clkpol; if (of_property_read_string(dev->of_node, "bus-format-override", &bus_fmt) == 0) { @@ -329,6 +347,18 @@ static inline int panel_simple_check_quirks(struct device *dev, bus_fmt); return p->bus_fmt_override ? 0 : -EINVAL; } + + if (of_property_read_u32(dev->of_node, "pixelclk-active", + &clkpol) == 0) { + if (clkpol & ~1) { + dev_err(dev, + "Invalid value for pixelclk-active: '%u' (should be <0> or <1>)\n", + clkpol); + return -EINVAL; + } + p->quirks |= clkpol ? PANEL_QUIRK_PIXDATA_POSEDGE : + PANEL_QUIRK_PIXDATA_NEGEDGE; + } return 0; }