From patchwork Tue Aug 15 07:19:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien DESSENNE X-Patchwork-Id: 801453 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xWkRz0GLsz9t32 for ; Tue, 15 Aug 2017 17:21:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753403AbdHOHUm (ORCPT ); Tue, 15 Aug 2017 03:20:42 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:62419 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753109AbdHOHUj (ORCPT ); Tue, 15 Aug 2017 03:20:39 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7F7JAkj020591; Tue, 15 Aug 2017 09:19:57 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 2cbr8krxj2-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 15 Aug 2017 09:19:57 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2E3DE34; Tue, 15 Aug 2017 07:19:57 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 10A8F13B7; Tue, 15 Aug 2017 07:19:57 +0000 (GMT) Received: from SAFEX1HUBCAS24.st.com (10.75.90.95) by Safex1hubcas22.st.com (10.75.90.92) with Microsoft SMTP Server (TLS) id 14.3.339.0; Tue, 15 Aug 2017 09:19:56 +0200 Received: from localhost (10.251.17.222) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 15 Aug 2017 09:19:56 +0200 From: Fabien Dessenne To: Herbert Xu , "David S . Miller" , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , , , , CC: Benjamin Gaignard , Lionel Debieve , Ludovic Barre Subject: [PATCH v2 2/3] dt-bindings: Document STM32 CRYP bindings Date: Tue, 15 Aug 2017 09:19:43 +0200 Message-ID: <1502781584-18468-3-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1502781584-18468-1-git-send-email-fabien.dessenne@st.com> References: <1502781584-18468-1-git-send-email-fabien.dessenne@st.com> MIME-Version: 1.0 X-Originating-IP: [10.251.17.222] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-08-15_04:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document device tree bindings for the STM32 CRYP. Signed-off-by: Fabien Dessenne Acked-by: Rob Herring --- .../devicetree/bindings/crypto/st,stm32-cryp.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt new file mode 100644 index 0000000..7c6d599 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt @@ -0,0 +1,20 @@ +* STMicroelectronics STM32 CRYP + +Required properties: +- compatible: Should be "st,stm32f756-cryp". +- reg: The address and length of the peripheral registers space +- clocks: The input clock of the CRYP instance +- interrupts: The CRYP interrupt + +Optional properties: +- resets: The input reset of the CRYP instance + +Example: +cryp1: cryp@50060000 { + compatible = "st,stm32f756-cryp"; + reg = <0x50060000 0x400>; + interrupts = <79>; + clocks = <&rcc 0 STM32F7_AHB2_CLOCK(CRYP)>; + resets = <&rcc STM32F7_AHB2_RESET(CRYP)>; + status = "disabled"; +};