From patchwork Mon Jul 31 05:39:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 795555 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="dN3bXjKl"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="DDQleLg5"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xLSy32JgJz9tW3 for ; Mon, 31 Jul 2017 15:42:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751447AbdGaFkY (ORCPT ); Mon, 31 Jul 2017 01:40:24 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:39212 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751375AbdGaFkU (ORCPT ); Mon, 31 Jul 2017 01:40:20 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 309AF60CE4; Mon, 31 Jul 2017 05:40:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1501479619; bh=RnQmIzel/mH0JDqQDLwzpuGo8AdXGxVyHn9H9dUtZ7U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dN3bXjKlztx009PviW82157Qhf+RAJqVIgkAGrtn6PrUbdYK83wPiF0ciRdxQTeyB tAgRatDCprcADBDTOt9ct+hmv4QK2ouclPdP1LLCBK1TY+CUG1hhYDla0W0VBrdXRI DzpvSHDeA1rCJ5bW04J/aMbX7cm1x8fZjbpQTwFU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from varda-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: varada@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6E89060C7B; Mon, 31 Jul 2017 05:40:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1501479614; bh=RnQmIzel/mH0JDqQDLwzpuGo8AdXGxVyHn9H9dUtZ7U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DDQleLg5vN+4XfhuTK2bp864Cxup9+L91WAwru1x9os82ro8z3fZAc72nw03pR4ip n0NC3aH2ybcjkHcjtIBMG642XAW5GEX+T9FRW7dil7m+UbBTOIZzhm2GrmWrDNn0ul zPvfRBbY5Wnqt1iFylA73Vbp5Fh+zqdccbD4nwuE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6E89060C7B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, svarbanov@mm-sol.com, kishon@ti.com, sboyd@codeaurora.org, vivek.gautam@codeaurora.org, fengguang.wu@intel.com, weiyongjun1@huawei.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Varadarajan Narayanan Subject: [PATCH v5 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Date: Mon, 31 Jul 2017 11:09:49 +0530 Message-Id: <1501479594-18285-3-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1501479594-18285-1-git-send-email-varada@codeaurora.org> References: <1501479594-18285-1-git-send-email-varada@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org IPQ8074 uses QMP phy controller that provides support to PCIe and USB. Adding dt binding information for the same. Signed-off-by: Varadarajan Narayanan Reviewed-by: Vivek Gautam --- Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index 5d7a51f..802af1b 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -6,6 +6,7 @@ controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. Required properties: - compatible: compatible list, contains: + "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996. @@ -38,6 +39,8 @@ Required properties: "phy", "common", "cfg". For "qcom,msm8996-qmp-usb3-phy" must contain "phy", "common". + For "qcom,ipq8074-qmp-pcie-phy" must contain: + "phy", "common". - vdda-phy-supply: Phandle to a regulator supply to PHY core block. - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block. @@ -63,6 +66,11 @@ Required properties for child node: - clock-output-names: Name of the phy clock that will be the parent for the above pipe clock. + For "qcom,ipq8074-qmp-pcie-phy": + - "pcie20_phy0_pipe_clk" Pipe Clock parent + (or) + "pcie20_phy1_pipe_clk" + - resets: a list of phandles and reset controller specifier pairs, one for each entry in reset-names. - reset-names: Must contain following for pcie qmp phys: