From patchwork Thu Jul 20 05:34:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 791404 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="SD+irhhh"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="eyQHj/qw"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xCjLj2VcWz9t2c for ; Thu, 20 Jul 2017 15:36:29 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934139AbdGTFfi (ORCPT ); Thu, 20 Jul 2017 01:35:38 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:39688 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933797AbdGTFfg (ORCPT ); Thu, 20 Jul 2017 01:35:36 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DB16D611A5; Thu, 20 Jul 2017 05:35:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500528935; bh=GdDsa4+B8rn7wibAgTFFuTx+hcegDaD5vp76e6EoGvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SD+irhhhWc4+t5V+11NBrABKLE7urEgYfHgVR246fQMbHumrDkF5dHbH3xFcu+AgN lvbyQcKeQ1STwyxLMk3EVQO+oUSLwP2ualCoDlsFJFz/Cp+0z/Dtc9fAsRCfTvBnLi znRJBT1E5k1Dpc/gz9c0FEWzMrJ1A9MTFuXfDkWY= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from varda-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: varada@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8AEE0612BB; Thu, 20 Jul 2017 05:35:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500528932; bh=GdDsa4+B8rn7wibAgTFFuTx+hcegDaD5vp76e6EoGvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eyQHj/qwtTVImSL0W24eRARkbuPTWFi9ADBjPZK/iBto+sDtP8npmp0XPh/RQ71LW QmVwDRn2n2hs2H5eRtpFS5oUN6mtWGWlNdklamhlHxBM+3p0bGhIcblDd86nm8ko5Q 9NQQ0pDodcy5DfKz3Sd203+fT++8r3D08XyQ51yQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8AEE0612BB Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, svarbanov@mm-sol.com, kishon@ti.com, sboyd@codeaurora.org, vivek.gautam@codeaurora.org, fengguang.wu@intel.com, weiyongjun1@huawei.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Varadarajan Narayanan Subject: [PATCH v3 7/8] dt-bindings: pci: qcom: Add support for IPQ8074 Date: Thu, 20 Jul 2017 11:04:39 +0530 Message-Id: <1500528880-25804-8-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500528880-25804-1-git-send-email-varada@codeaurora.org> References: <1500528880-25804-1-git-send-email-varada@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for the IPQ8074 PCIe controller. IPQ8074 supports Gen 1/2, one lane, two PCIe root complex with support for MSI and legacy interrupts, and it conforms to PCI Express Base 2.1 specification. Signed-off-by: Varadarajan Narayanan --- .../devicetree/bindings/pci/qcom,pcie.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 9d418b7..b3e36ef 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -9,6 +9,7 @@ - "qcom,pcie-apq8084" for apq8084 - "qcom,pcie-msm8996" for msm8996 or apq8096 - "qcom,pcie-ipq4019" for ipq4019 + - "qcom,pcie-ipq8074" for ipq8074 - reg: Usage: required @@ -105,6 +106,16 @@ - "bus_master" Master AXI clock - "bus_slave" Slave AXI clock +- clock-names: + Usage: required for ipq8074 + Value type: + Definition: Should contain the following entries + - "iface" PCIe to SysNOC BIU clock + - "axi_m" AXI Master clock + - "axi_s" AXI Slave clock + - "ahb" AHB clock + - "aux" Auxiliary clock + - resets: Usage: required Value type: @@ -144,6 +155,18 @@ - "ahb" AHB reset - "phy_ahb" PHY AHB reset +- reset-names: + Usage: required for ipq8074 + Value type: + Definition: Should contain the following entries + - "pipe" PIPE reset + - "sleep" Sleep reset + - "sticky" Core Sticky reset + - "axi_m" AXI Master reset + - "axi_s" AXI Slave reset + - "ahb" AHB Reset + - "axi_m_sticky" AXI Master Sticky reset + - power-domains: Usage: required for apq8084 and msm8996/apq8096 Value type: