From patchwork Wed Jun 14 05:52:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 775612 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wnbSW60d6z9s7g for ; Wed, 14 Jun 2017 15:54:51 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="jJRmzScE"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="jJRmzScE"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752154AbdFNFyg (ORCPT ); Wed, 14 Jun 2017 01:54:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45130 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754572AbdFNFyW (ORCPT ); Wed, 14 Jun 2017 01:54:22 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A929760861; Wed, 14 Jun 2017 05:54:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1497419661; bh=20XwXboZxjMK5itkZ9Lkqk5FDWz1WVqxQSI3+7dw210=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jJRmzScEw3ZDyr5JwA7Y64mq7RwPdc0mcMbc0a8C3HZvhT6gAjJ8aYt5L8gnoZL+j H8j6rlh65NTTawxwZO/TX/JZEfOQWYdbUCRGlfSRxZi4sQkc8oJFd47d+zBwKAIEIO D8BAuu1SifzXVDJ6F9kxhvDEYfVbFFurpc8IyOnc= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: varada@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 85BCC60863; Wed, 14 Jun 2017 05:54:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1497419661; bh=20XwXboZxjMK5itkZ9Lkqk5FDWz1WVqxQSI3+7dw210=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jJRmzScEw3ZDyr5JwA7Y64mq7RwPdc0mcMbc0a8C3HZvhT6gAjJ8aYt5L8gnoZL+j H8j6rlh65NTTawxwZO/TX/JZEfOQWYdbUCRGlfSRxZi4sQkc8oJFd47d+zBwKAIEIO D8BAuu1SifzXVDJ6F9kxhvDEYfVbFFurpc8IyOnc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 85BCC60863 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: Varadarajan Narayanan , Abhishek Sahu Subject: [PATCH 18/18] spi: qup: support for qup v1 dma Date: Wed, 14 Jun 2017 11:22:31 +0530 Message-Id: <1497419551-21834-19-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1497419551-21834-1-git-send-email-varada@codeaurora.org> References: <1497419551-21834-1-git-send-email-varada@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently the QUP Version v1 does not work with DMA so added the support for the same. 1. It uses ADM DMA which requires TX and RX CRCI 2. DMA channel initialization need to be done after setting block size for having valid values in maxburst 3. QUP mode should be DMOV instead of BAM. Signed-off-by: Abhishek Sahu Signed-off-by: Varadarajan Narayanan --- .../devicetree/bindings/spi/qcom,spi-qup.txt | 6 ++++ drivers/spi/spi-qup.c | 35 +++++++++++++++++----- 2 files changed, 34 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt index 5c09077..e754181 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt @@ -38,6 +38,12 @@ Optional properties: - dma-names: Names for the dma channels, if present. There must be at least one channel named "tx" for transmit and named "rx" for receive. +- qcom,tx-crci: Identificator for Client Rate Control Interface (CRCI) to be + used with TX DMA channel. Required when using DMA for + transmission with QUP Version 1 i.e qcom,spi-qup-v1.1.1. +- qcom,rx-crci: Identificator for Client Rate Control Interface (CRCI) to be + used with RX DMA channel. Required when using DMA for + receiving with QUP Version 1 i.e qcom,spi-qup-v1.1.1. SPI slave nodes must be children of the SPI master node and can contain properties described in Documentation/devicetree/bindings/spi/spi-bus.txt diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index 4ef9301..10666e7 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -691,7 +691,8 @@ static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer) else if (spi->master->can_dma && spi->master->can_dma(spi->master, spi, xfer) && spi->master->cur_msg_mapped) - controller->mode = QUP_IO_M_MODE_BAM; + controller->mode = controller->qup_v1 ? QUP_IO_M_MODE_DMOV : + QUP_IO_M_MODE_BAM; else controller->mode = QUP_IO_M_MODE_BLOCK; @@ -730,6 +731,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); break; case QUP_IO_M_MODE_BAM: + case QUP_IO_M_MODE_DMOV: reinit_completion(&controller->txc); reinit_completion(&controller->rxc); writel_relaxed(controller->n_words, @@ -934,6 +936,7 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) struct dma_slave_config *rx_conf = &spi->rx_conf, *tx_conf = &spi->tx_conf; struct device *dev = spi->dev; + u32 tx_crci = 0, rx_crci = 0; int ret; /* allocate dma resources, if available */ @@ -947,16 +950,34 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) goto err_tx; } + if (spi->qup_v1) { + ret = of_property_read_u32(dev->of_node, "qcom,tx-crci", + &tx_crci); + if (ret) { + dev_err(dev, "missing property qcom,tx-crci\n"); + goto err; + } + + ret = of_property_read_u32(dev->of_node, "qcom,rx-crci", + &rx_crci); + if (ret) { + dev_err(dev, "missing property qcom,rx-crci\n"); + goto err; + } + } + /* set DMA parameters */ rx_conf->direction = DMA_DEV_TO_MEM; rx_conf->device_fc = 1; rx_conf->src_addr = base + QUP_INPUT_FIFO; rx_conf->src_maxburst = spi->in_blk_sz; + rx_conf->slave_id = rx_crci; tx_conf->direction = DMA_MEM_TO_DEV; tx_conf->device_fc = 1; tx_conf->dst_addr = base + QUP_OUTPUT_FIFO; tx_conf->dst_maxburst = spi->out_blk_sz; + tx_conf->slave_id = tx_crci; ret = dmaengine_slave_config(master->dma_rx, rx_conf); if (ret) { @@ -1083,12 +1104,6 @@ static int spi_qup_probe(struct platform_device *pdev) controller->cclk = cclk; controller->irq = irq; - ret = spi_qup_init_dma(master, res->start); - if (ret == -EPROBE_DEFER) - goto error; - else if (!ret) - master->can_dma = spi_qup_can_dma; - /* set v1 flag if device is version 1 */ if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1")) controller->qup_v1 = 1; @@ -1125,6 +1140,12 @@ static int spi_qup_probe(struct platform_device *pdev) controller->in_blk_sz, controller->in_fifo_sz, controller->out_blk_sz, controller->out_fifo_sz); + ret = spi_qup_init_dma(master, res->start); + if (ret == -EPROBE_DEFER) + goto error; + else if (!ret) + master->can_dma = spi_qup_can_dma; + writel_relaxed(1, base + QUP_SW_RESET); ret = spi_qup_set_state(controller, QUP_STATE_RESET);