From patchwork Fri Mar 10 21:30:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Moritz Fischer X-Patchwork-Id: 737581 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vg0mq4Yh1z9s7t for ; Sat, 11 Mar 2017 08:30:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932595AbdCJVat (ORCPT ); Fri, 10 Mar 2017 16:30:49 -0500 Received: from mail.kernel.org ([198.145.29.136]:41476 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932372AbdCJVat (ORCPT ); Fri, 10 Mar 2017 16:30:49 -0500 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C28F12058A; Fri, 10 Mar 2017 21:30:46 +0000 (UTC) Received: from tyrael.amer.corp.natinst.com (207-114-172-147.static.twtelecom.net [207.114.172.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9DCE720552; Fri, 10 Mar 2017 21:30:45 +0000 (UTC) From: Moritz Fischer To: linux-fpga@vger.kernel.org Cc: robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, Moritz Fischer , Michal Simek , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/2] doc: Add bindings document for Xilinx LogiCore PR Decoupler Date: Fri, 10 Mar 2017 13:30:34 -0800 Message-Id: <1489181435-3151-1-git-send-email-mdf@kernel.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the binding documentation for the Xilinx LogiCORE PR Decoupler soft core. Signed-off-by: Moritz Fischer Cc: Michal Simek Cc: Sören Brinkmann Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org --- .../bindings/fpga/xilinx-pr-decoupler.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt new file mode 100644 index 0000000..b82b928 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt @@ -0,0 +1,24 @@ +Xilinx LogiCORE Partial Reconfig Decoupler Softcore + +The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more +decouplers / fpga bridges. +The controller can decouple/disable the bridges which prevents signal +changes from passing through the bridge. The controller can also +couple /enable the bridges which allows traffic to pass through the +bridge normally. + +Required properties: +- compatible : Should contain "xlnx,pr-decoupler-1.00" +- regs : base address and size for decoupler module + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + fpga-bridge@100000450 { + compatible = "xlnx,pr-decoupler-1.00"; + regs = <0x1000 0x10>; + bridge-enable = <0>; + };