From patchwork Mon Jan 23 16:32:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 718659 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3v6cPF3VjGz9srZ for ; Tue, 24 Jan 2017 03:35:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751057AbdAWQf2 (ORCPT ); Mon, 23 Jan 2017 11:35:28 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:58183 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750726AbdAWQf1 (ORCPT ); Mon, 23 Jan 2017 11:35:27 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id v0NGRbfV021091; Mon, 23 Jan 2017 17:33:51 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 283x024yk6-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Jan 2017 17:33:51 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BA0A33F; Mon, 23 Jan 2017 16:33:50 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 80B5929CA; Mon, 23 Jan 2017 16:33:50 +0000 (GMT) Received: from localhost (10.201.23.162) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 23 Jan 2017 17:33:50 +0100 From: Arnaud Pouliquen To: , , , , Lee Jones , Rob Herring , Mark Rutland , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Jaroslav Kysela , Takashi Iwai , Liam Girdwood , Mark Brown CC: Maxime Coquelin , Alexandre Torgue , Subject: [PATCH 3/7] IIO: add bindings for STM32 DFSDM ADC driver Date: Mon, 23 Jan 2017 17:32:21 +0100 Message-ID: <1485189145-29576-4-git-send-email-arnaud.pouliquen@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485189145-29576-1-git-send-email-arnaud.pouliquen@st.com> References: <1485189145-29576-1-git-send-email-arnaud.pouliquen@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.162] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-01-23_15:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds documentation of device tree bindings for the STM32 DFSDM ADC. Signed-off-by: Arnaud Pouliquen --- .../bindings/iio/adc/st,stm32-dfsdm-adc.txt | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt new file mode 100644 index 0000000..c156bcb --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt @@ -0,0 +1,60 @@ +STMicroelectronics STM32 DFSDM ADC device driver + +STM32 DFSDM ADC is a sigma delta analog-to-digital converter. +It has to be declared in device-tree as a subnode of the DFSDM mfd node. + +It has several multiplexed input channels. Conversions can be performed +in single, scan or discontinuous mode. Conversions can be launched in software +or using hardware triggers. +Each instance of the driver uses one filter instance handle by the DFSDM mfd +driver. + +DFSDM also offers extra features: +-The analog watchdog feature allows the application to detect if the + input voltage goes beyond the user-defined, higher or lower thresholds. +-The short circuit detection allows allows the application to detect if the + input is in CC. +-The clock absence detection allows application to detect if SPI input is clocked. + +Required properties: +- compatible: Must be "st,stm32-dfsdm-adc". +- reg: Specifies the DFSDM filter instance. +- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers". +- st,adc-channels: List of single-ended channels muxed for this ADC. +- st,adc-channel-names: List of single-ended channels Name. + +Optional properties: +- st,adc-channel-types: Single-ended channel input type. Default value is 0. + - 0: SPI with data on rising edge (default) + - 1: SPI with data on falling edge + - 2: manchester codec, rising edage = logic 0 + - 3: manchester codec, rising edage = logic 1 +- st,adc-channel-clk-src: Conversion clock source. default value is 1. + - 0: External SPI clocl (CLKIN x) + - 1: internal SPI clock (CLKOUT) (default) + - 2: internal SPI clock divided by 2 (falling edge). + - 2: internal SPI clock divided by 2 (rising edge). +- st,adc-alt-channel: must be defined if Two ADCs are connected on same SPI + input. + If not set channel n is connected to SPI input n. + If set channel n is connected to SPI input n + 1. + +Example: + dfsdm: dfsdm@4400D000 { + iio_dfsdm0: iio-dfsdm@0 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <0>; + st,adc-channels = <1>; + st,adc-channel-names = "in0"; + }; + iio_dfsdm1: iio-dfsdm@1 { + compatible = "st,stm32-dfsdm-adc"; + #io-channel-cells = <1>; + reg = <1>; + st,adc-channels = <1>; + st,adc-channel-names = "in1"; + st,adc-channel-types = <1>; + st,adc-alt-channel = <1>; + }; + };