From patchwork Thu Jan 5 04:11:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Reid X-Patchwork-Id: 711215 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tvDlt1yJlz9t10 for ; Thu, 5 Jan 2017 15:12:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967026AbdAEEMI (ORCPT ); Wed, 4 Jan 2017 23:12:08 -0500 Received: from anchovy3.45ru.net.au ([203.30.46.155]:38586 "EHLO anchovy.45ru.net.au" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S937803AbdAEELL (ORCPT ); Wed, 4 Jan 2017 23:11:11 -0500 Received: (qmail 10946 invoked by uid 5089); 5 Jan 2017 04:11:08 -0000 Received: by simscan 1.2.0 ppid: 10909, pid: 10910, t: 0.0269s scanners: regex: 1.2.0 attach: 1.2.0 clamav: 0.88.3/m:40/d:1950 Received: from unknown (HELO preid-centos7.electromag.com.au) (preid@electromag.com.au@203.59.230.133) by anchovy2.45ru.net.au with ESMTPA; 5 Jan 2017 04:11:08 -0000 Received: by preid-centos7.electromag.com.au (Postfix, from userid 1000) id 28B203048AC30; Thu, 5 Jan 2017 12:11:07 +0800 (AWST) From: Phil Reid To: peda@axentia.se, wsa@the-dreams.de, robh+dt@kernel.org, mark.rutland@arm.com, preid@electromag.com.au, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 4/5] dt: bindings: i2c-mux-pca954x: Add documentation for i2c-mux-irq-mask-en Date: Thu, 5 Jan 2017 12:11:02 +0800 Message-Id: <1483589463-35380-5-git-send-email-preid@electromag.com.au> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1483589463-35380-1-git-send-email-preid@electromag.com.au> References: <1483589463-35380-1-git-send-email-preid@electromag.com.au> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Unfortunately some hardware device will assert their irq line immediately on power on and provide no mechanism to mask the irq. As the i2c muxes provide no method to mask irq line this provides a work around by keeping the parent irq masked until enough device drivers have loaded to service all pending interrupts. For example the the ltc1760 assert its SMBALERT irq immediately on power on. With two ltc1760 attached to bus 0 & 1 on a pca954x mux when the first device is registered irq are enabled and fire continuously as the second device driver has not yet loaded. Setting this parameter to 0x3 while delay the irq being enabled until both devices are ready. Acked-by: Peter Rosin Signed-off-by: Phil Reid --- Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt index aa09704..6de1e8e 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt @@ -19,6 +19,8 @@ Optional Properties: - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all children in idle state. This is necessary for example, if there are several multiplexers on the bus and the devices behind them use same I2C addresses. + - nxp,irq-mask-enable: BitMask; Defines a mask for which irq lines need to be + unmasked before the parent irq line in enabled. - interrupt-parent: Phandle for the interrupt controller that services interrupts for this device. - interrupts: Interrupt mapping for IRQ. @@ -36,6 +38,7 @@ Example: #size-cells = <0>; reg = <0x74>; + nxp,irq-mask-enable = <0x3>; interrupt-parent = <&ipic>; interrupts = <17 IRQ_TYPE_LEVEL_LOW>; interrupt-controller;