From patchwork Fri Sep 9 12:45:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin Labbe X-Patchwork-Id: 668017 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sVxmf4QXNz9s3v for ; Fri, 9 Sep 2016 22:47:14 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=WC6n1Mow; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754878AbcIIMrF (ORCPT ); Fri, 9 Sep 2016 08:47:05 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34601 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754685AbcIIMqw (ORCPT ); Fri, 9 Sep 2016 08:46:52 -0400 Received: by mail-wm0-f66.google.com with SMTP id w12so2620272wmf.1; Fri, 09 Sep 2016 05:46:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Yl4AAFl/AtYnCn6hwTqcF14zqrUyN/zwvTUkH7Cjwdo=; b=WC6n1Mowiuijxq61+UWwJXGncfiCe1F5D/ljWVu7SEXNcbbhRI341+UsEh1n6vYiDd hEY993GpLxt/JeTGGpS363UdBQG9vmIRYDiDAnRRCf1OJFwtY2pAj2rAC/5SzufllrdF 5n0s7ZbS0WWehf5kFIAGmFC7ROjQOSwJDOSNqhaCzMS+S3NTPSdq8+8pWEVN+TSPS9yB if3ASpzDjkA/PEPlovBnceN8GqFtsS/4gB+3k68MZin+XKSGYQw3i+Li9zA3cF/ZJ3i5 dXRw7ltaKuqqLwpfV6dsjF/aNVN61VRe0jvrp9KOytW6voHNKVLHTWMruMcAilSnZW2D g33A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Yl4AAFl/AtYnCn6hwTqcF14zqrUyN/zwvTUkH7Cjwdo=; b=DJC2RWxKF8yXk9Gy4S7xCzUsMvDLYHMEbvtwK9vfLsx/MYQF1FjU0cToOS2dzzg42O 6262rFoXvzBFf0omsJMJv7V24XFjmC+pFLKwgosAHLzEz9E6+zpvS0z2FqCn434f8L/u EX7z8DrsUTt1BfjQgVfghlUeHtB5ZVQsTVjb4RwRtaAXge1JUMZwEsC8OOZOL0Gntu3x tnkcA2xTlVmkj7/qFCGsd3sBxXTo5UpY39s2v6o89o7PKkXDDn2lkbeet8WaFQC+/JQB J2VDLHwjUfyKlwM/5H/7dnY6R25vkF776CE+0sU50H0rFr66JlOUi1DuZEZRNKxfCm8q 3STQ== X-Gm-Message-State: AE9vXwOH9f+41LdsoPCYAak3SC0MpG/wOEtzTcXeUY8LUEEgJq5pFn1SME+uRdWoTKqSCg== X-Received: by 10.194.184.132 with SMTP id eu4mr2937168wjc.114.1473425210855; Fri, 09 Sep 2016 05:46:50 -0700 (PDT) Received: from Red.local (LFbn-1-7035-57.w90-116.abo.wanadoo.fr. [90.116.208.57]) by smtp.googlemail.com with ESMTPSA id b188sm3192572wmg.24.2016.09.09.05.46.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Sep 2016 05:46:50 -0700 (PDT) From: Corentin Labbe To: robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, davem@davemloft.net Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Corentin Labbe Subject: [PATCH v3 3/9] ARM: sun8i: dt: Add DT bindings documentation for Allwinner sun8i-emac Date: Fri, 9 Sep 2016 14:45:11 +0200 Message-Id: <1473425117-18645-4-git-send-email-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1473425117-18645-1-git-send-email-clabbe.montjoie@gmail.com> References: <1473425117-18645-1-git-send-email-clabbe.montjoie@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds documentation for Device-Tree bindings for the Allwinner sun8i-emac driver. Signed-off-by: Corentin Labbe --- .../bindings/net/allwinner,sun8i-emac.txt | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt new file mode 100644 index 0000000..4968ee3 --- /dev/null +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt @@ -0,0 +1,64 @@ +* Allwinner sun8i EMAC ethernet controller + +Required properties: +- compatible: should be one of the following string: + "allwinner,sun8i-a83t-emac" + "allwinner,sun8i-h3-emac" + "allwinner,sun50i-a64-emac" +- reg: address and length of the register for the device. +- reg-names: should be "emac" +- syscon: A phandle to the syscon of the SoC +- interrupts: interrupt for the device +- clocks: A phandle to the reference clock for this device +- clock-names: should be "ahb" +- resets: A phandle to the reset control for this device +- reset-names: should be "ahb" +- phy-mode: See ethernet.txt +- phy or phy-handle: See ethernet.txt +- #address-cells: shall be 1 +- #size-cells: shall be 0 + +"allwinner,sun8i-h3-emac" also requires: +- clocks: an extra phandle to the reference clock for the EPHY +- clock-names: an extra "ephy" entry matching the clocks property +- resets: an extra phandle to the reset control for the EPHY +- resets-names: an extra "ephy" entry matching the resets property + +See ethernet.txt in the same directory for generic bindings for ethernet +controllers. + +The device node referenced by "phy" or "phy-handle" should be a child node +of this node. See phy.txt for the generic PHY bindings. + +Optional properties: +- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) +- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) + +The TX/RX clock delay chain settings are board specific. + +Optional properties for "allwinner,sun8i-h3-emac": +- allwinner,leds-active-low: EPHY LEDs are active low + +Example: + +emac: ethernet@01c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; + reg = <0x01c0b000 0x104>; + reg-names = "emac"; + interrupts = ; + resets = <&ccu RST_BUS_EMAC>, <<&ccu RST_BUS_EPHY>; + reset-names = "ahb", "ephy"; + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; + clock-names = "ahb", "ephy"; + #address-cells = <1>; + #size-cells = <0>; + + phy = <&phy1>; + phy-mode = "mii"; + allwinner,leds-active-low; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +};