From patchwork Tue Jun 21 01:54:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 638384 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rYW7272TXz9sdg for ; Tue, 21 Jun 2016 11:56:46 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=BZBaRCrZ; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752996AbcFUB4l (ORCPT ); Mon, 20 Jun 2016 21:56:41 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:35024 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752024AbcFUBzw (ORCPT ); Mon, 20 Jun 2016 21:55:52 -0400 Received: by mail-pf0-f195.google.com with SMTP id t190so172994pfb.2; Mon, 20 Jun 2016 18:54:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=ZFtYS1Ai4x0qBg6vT2Mie5DFqJoQHkJX0EKWu1Xp3Ig=; b=BZBaRCrZt67oM1b9qL3g/F96SzIV+EPtjxv3H7p+W249EfmgH8biEwn6EuWwQbZ3W4 QHBifWZrenPBHcv7V/2prAY8pODhatAnCgymqS1pLinDuLzUb0BCzzLdaTMiUCrkxKsX oq7VX1WoEt1qlgEQPHLe59Hqke2vh+j9GTQxIotttfx4AQFORvGRRstR34K2DnkPHRS8 C30aVBymP+87Hvx4nZmILC570DKqOxD9r/aATHJxHqOpwgnh0GrxwLo6sJYVxqH3A3QN uKxI9gq6BN1CnsyadNRCB/qtSr5UiQz3/Yu91llOEGxKoLXTK697eWcVyIMpv/Ix2W54 Y1QA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ZFtYS1Ai4x0qBg6vT2Mie5DFqJoQHkJX0EKWu1Xp3Ig=; b=Sf+xeAaaED2752NGEuZHd4LB4NRJrzn/ypDpwkgBTEjHshoqcz347TA2dnu+FuGmTv l2sLGNiWsLwjH6+/onFd3vJlxHBmxuexhm/4FnslfxKGvL87dfs5TBhSDu1yIwfyMDKj jArMMuX+tCSWK2MXlTrkA1KG8pp4WejtPmRsqrUOb1GiWOsq8kQe1Uv29GIW7ERLIvsh rahZWCSlDZ/PFkYyuvP94KgfII96xR7U+Vbr6FpdbJCbwFG94DLuHjaar1+AxNMB30vB dhiz58kj7cKCubnfWp3NYplVMgAvINkZIIvrx9ATa0filbE4KNUVemqLnzRQmVBZOI9Z 8rpQ== X-Gm-Message-State: ALyK8tILidXrjBKTHz4Yq5rAo5BCtHhxR0HRJVlNtBzxCEG2Lcmr9gqc2DAXskGi4sgJEQ== X-Received: by 10.98.149.149 with SMTP id c21mr25229175pfk.73.1466474097269; Mon, 20 Jun 2016 18:54:57 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (searspoint.nvidia.com. [216.228.112.21]) by smtp.gmail.com with ESMTPSA id pk18sm60059143pab.27.2016.06.20.18.54.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 Jun 2016 18:54:56 -0700 (PDT) From: Nicolin Chen To: broonie@kernel.org Cc: lgirdwood@gmail.com, brian.austin@cirrus.com, Paul.Handrigan@cirrus.com, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Subject: [PATCH] ASoC: cs53l30: Add MUTE pin control support via GPIO Date: Mon, 20 Jun 2016 18:54:44 -0700 Message-Id: <1466474084-6775-1-git-send-email-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.1.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The codec chip has a physical MUTE pin to let users control it via GPIO. So this patch add a mute control support to the driver. Signed-off-by: Nicolin Chen --- .../devicetree/bindings/sound/cs53l30.txt | 2 ++ sound/soc/codecs/cs53l30.c | 30 ++++++++++++++++++++++ sound/soc/codecs/cs53l30.h | 1 + 3 files changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/cs53l30.txt b/Documentation/devicetree/bindings/sound/cs53l30.txt index 18d6b99..6f7d3c8 100644 --- a/Documentation/devicetree/bindings/sound/cs53l30.txt +++ b/Documentation/devicetree/bindings/sound/cs53l30.txt @@ -13,6 +13,8 @@ Optional properties: - reset-gpios : a GPIO spec for the reset pin. + - mute-gpios : a GPIO spec for the MUTE pin. + - cirrus,micbias-lvl : Set the output voltage level on the MICBIAS Pin. 0 = Hi-Z 1 = 1.80 V diff --git a/sound/soc/codecs/cs53l30.c b/sound/soc/codecs/cs53l30.c index b0a64a1..5988b5c 100644 --- a/sound/soc/codecs/cs53l30.c +++ b/sound/soc/codecs/cs53l30.c @@ -35,6 +35,7 @@ struct cs53l30_private { struct regulator_bulk_data supplies[CS53L30_NUM_SUPPLIES]; struct regmap *regmap; struct gpio_desc *reset_gpio; + struct gpio_desc *mute_gpio; struct clk *mclk; bool use_sdout2; u32 mclk_rate; @@ -833,6 +834,16 @@ static int cs53l30_set_dai_tdm_slot(struct snd_soc_dai *dai, return 0; } +static int cs53l30_mute_stream(struct snd_soc_dai *dai, int mute, int stream) +{ + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(dai->codec); + + if (priv->mute_gpio) + gpiod_set_value_cansleep(priv->mute_gpio, mute); + + return 0; +} + /* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */ #define CS53L30_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT) @@ -846,6 +857,7 @@ static const struct snd_soc_dai_ops cs53l30_ops = { .set_sysclk = cs53l30_set_sysclk, .set_tristate = cs53l30_set_tristate, .set_tdm_slot = cs53l30_set_dai_tdm_slot, + .mute_stream = cs53l30_mute_stream, }; static struct snd_soc_dai_driver cs53l30_dai = { @@ -991,6 +1003,24 @@ static int cs53l30_i2c_probe(struct i2c_client *client, cs53l30->mclk = NULL; } + /* Fetch the MUTE control */ + cs53l30->mute_gpio = devm_gpiod_get_optional(dev, "mute", + GPIOD_OUT_HIGH); + if (IS_ERR(cs53l30->mute_gpio)) { + ret = PTR_ERR(cs53l30->mute_gpio); + goto error; + } + + if (cs53l30->mute_gpio) { + /* Enable MUTE controls via MUTE pin */ + regmap_write(cs53l30->regmap, CS53L30_MUTEP_CTL1, + CS53L30_MUTEP_CTL1_MUTEALL); + /* Flip the polarity of MUTE pin */ + if (gpiod_is_active_low(cs53l30->mute_gpio)) + regmap_update_bits(cs53l30->regmap, CS53L30_MUTEP_CTL2, + CS53L30_MUTE_PIN_POLARITY, 0); + } + if (!of_property_read_u8(np, "cirrus,micbias-lvl", &val)) regmap_update_bits(cs53l30->regmap, CS53L30_MICBIAS_CTL, CS53L30_MIC_BIAS_CTRL_MASK, val); diff --git a/sound/soc/codecs/cs53l30.h b/sound/soc/codecs/cs53l30.h index 0dd4afb..5e39da5 100644 --- a/sound/soc/codecs/cs53l30.h +++ b/sound/soc/codecs/cs53l30.h @@ -253,6 +253,7 @@ #define CS53L30_MUTE_MB_ALL_PDN_MASK (1 << CS53L30_MUTE_MB_ALL_PDN_SHIFT) #define CS53L30_MUTE_MB_ALL_PDN (1 << CS53L30_MUTE_MB_ALL_PDN_SHIFT) +#define CS53L30_MUTEP_CTL1_MUTEALL (0xdf) #define CS53L30_MUTEP_CTL1_DEFAULT (0) /* R32 (0x20) CS53L30_MUTEP_CTL2 - MUTE Pin Control 2 */