From patchwork Fri Jun 3 23:25:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 630078 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rM0dq6CzJz9t9F for ; Sat, 4 Jun 2016 09:28:31 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=iIN0YLjT; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750828AbcFCXZr (ORCPT ); Fri, 3 Jun 2016 19:25:47 -0400 Received: from mail-oi0-f41.google.com ([209.85.218.41]:36459 "EHLO mail-oi0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750716AbcFCXZp (ORCPT ); Fri, 3 Jun 2016 19:25:45 -0400 Received: by mail-oi0-f41.google.com with SMTP id j1so149675995oih.3 for ; Fri, 03 Jun 2016 16:25:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=iIN0YLjTJohYDvO5SQBPsoJICnewBdcQvyGPXF21SHC0bSiX7VbMduA6fjkjA0IpPJ qVkND6SlCF2I8D3e1lFUMP0LkX1nSzOUHMZuC5Jt/SB2MBcq8yQXaVHUgBRNXikaBiud 3pZBBIQR+ZXQgh+6jkBac1MSSVNoDeGbO1JP8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=keJ63ZnMiU3zwAV+G01XqQ9T9DmLXPA+XMKDkU8AZSocnMDy00MPjirKWmTOlboJkF /VG20724wHD7ScWhC1ZD8X87Z82Yz5KP7IgeS5rE2x6o2PbRa+Wa//aj9Ysf5lpofQ3k vcsZLJmLDdMkpZhHTDNBgx02YnNPoZHaLrFcBt+hQqeufNjuLIwTFnVou8o+wy+O4wBi Ta/F18iMCL/eEeSKixP0k7F9bC7kNrD7/XUJKI1g6lmua5PKJ6c2X711xqreLIqHNVCB JC5Rpt6gXpIfIAzyA6Nrr0uqLn13ponja+94iI7vR84qrfU7kwZQIQuakKvHwmAymvSt frtA== X-Gm-Message-State: ALyK8tKUMlMkFbweGfso2nElQjsetjIPaljOXLWhBovp0+ivx0/Ed/+4n12ggvu+hFus/ee/ X-Received: by 10.157.46.177 with SMTP id w46mr3053560ota.181.1464996344758; Fri, 03 Jun 2016 16:25:44 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a575:d8f4:7700:e330]) by smtp.gmail.com with ESMTPSA id 92sm4374004otw.16.2016.06.03.16.25.44 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 03 Jun 2016 16:25:44 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bjorn Andersson , Stephen Boyd , devicetree@vger.kernel.org, jilai wang , Andy Gross Subject: [Patch v6 01/10] dt/bindings: firmware: Add Qualcomm SCM binding Date: Fri, 3 Jun 2016 18:25:21 -0500 Message-Id: <1464996330-16952-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> References: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross Reviewed-by: Stephen Boyd Acked-by: Bjorn Andersson Acked-by: Rob Herring --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..3b4436e --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 platforms + * "qcom,scm-msm8660" for MSM8660 platforms + * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" + * Core, iface, and bus clocks required for "qcom,scm" +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };