From patchwork Mon Apr 25 23:08:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 614739 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qv26m57DXz9sdb for ; Tue, 26 Apr 2016 09:12:00 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=FWdKF/cX; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752104AbcDYXLp (ORCPT ); Mon, 25 Apr 2016 19:11:45 -0400 Received: from mail-oi0-f54.google.com ([209.85.218.54]:34398 "EHLO mail-oi0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752074AbcDYXIz (ORCPT ); Mon, 25 Apr 2016 19:08:55 -0400 Received: by mail-oi0-f54.google.com with SMTP id k142so193289724oib.1 for ; Mon, 25 Apr 2016 16:08:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pTQyUmtU6zouyyieA3PgaeEgErlDV8qphqYEQPnZEUQ=; b=FWdKF/cXBCC51amSRd8jPoW987OXuDrOPlI+a1uh62gAqG+kP8yCCV8Y9AqiHOYfRh PVhVIDtlk8M7TiTG2K9R8s3LNigEM0RQ3luBFDq/T1f6nkrv8AvfcLxXt/OXXOHY/IlP h2FWf6TsWSbyvrg4cJF4bcJr70TbSjjA708Mg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pTQyUmtU6zouyyieA3PgaeEgErlDV8qphqYEQPnZEUQ=; b=Ab2qBuJ4kc9GD66gY8ir/tXWTKo2PllZr9t7/tE8IKovFu0nrsaYPw2NXn4iEgw326 g2q1ksSjJ90AyT49KWh1hdWKaLaRyCikvAxqv+56a3J5iwEqoGe2tEED2DM3tEQOlx7T jWsUanQ1EzM5Xqfj2R+/4351Vh/Xqui4cZpQubKJNaHRPDcFp3kX+BjI7HwvXeL0+6GY UwIEVE3YFva2drOScGmCVMF9d9jAu31dZfmMM6bDpSljgxl/3eWeM2qI/5eSNafApJTc T+DdRo/x2E+uHZKyySvqYgiJNUkHkIE2+UAOaMvv1wwF0thGfCcNXHjpTFRKYaxeapgI cWuw== X-Gm-Message-State: AOPr4FX5ZKdTw5bDVB+3cJGeApNrXg7ewFZYQZRLpwhPQh+7PKqotpWPbvpG5F/cMNP0f/wC X-Received: by 10.157.51.70 with SMTP id u6mr12603488otd.8.1461625734776; Mon, 25 Apr 2016 16:08:54 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:396f:541d:66bc:56f0]) by smtp.gmail.com with ESMTPSA id k125sm7274287oia.21.2016.04.25.16.08.54 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 25 Apr 2016 16:08:54 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, jilai wang , Stephen Boyd , Andy Gross Subject: [Patch v2 1/8] dt/bindings: firmware: Add Qualcomm SCM binding Date: Mon, 25 Apr 2016 18:08:38 -0500 Message-Id: <1461625725-32425-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461625725-32425-1-git-send-email-andy.gross@linaro.org> References: <1461625725-32425-1-git-send-email-andy.gross@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..a679a87 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 + * "qcom,scm-apq8084" for APQ8084 + * "qcom,scm-msm8916" for MSM8916 + * "qcom,scm-msm8974" for MSM8974 +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8064" + * Core, iface, and bus clocks required for all other compatibles. +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm-msm8916"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };