From patchwork Fri Mar 4 12:57:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 592028 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id CA1C8140291 for ; Fri, 4 Mar 2016 23:58:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751476AbcCDM6J (ORCPT ); Fri, 4 Mar 2016 07:58:09 -0500 Received: from down.free-electrons.com ([37.187.137.238]:48259 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750915AbcCDM6H (ORCPT ); Fri, 4 Mar 2016 07:58:07 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id AD1313ED; Fri, 4 Mar 2016 13:58:03 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (AToulouse-657-1-1129-172.w92-156.abo.wanadoo.fr [92.156.51.172]) by mail.free-electrons.com (Postfix) with ESMTPSA id 7859D228; Fri, 4 Mar 2016 13:58:03 +0100 (CET) From: Thomas Petazzoni To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org Cc: Nadav Haklai , Lior Amsalem , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , linux-arm-kernel@lists.infradead.org, Yehuda Yitschak , Neta Zur Hershkovits , devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , Thomas Petazzoni Subject: [PATCH v3 1/3] dt-bindings: arm: add DT binding for Marvell AP806 system controller Date: Fri, 4 Mar 2016 13:57:53 +0100 Message-Id: <1457096275-7581-2-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1457096275-7581-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1457096275-7581-1-git-send-email-thomas.petazzoni@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Thomas Petazzoni Acked-by: Rob Herring --- .../arm/marvell/ap806-system-controller.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt new file mode 100644 index 0000000..5086b89 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -0,0 +1,34 @@ +Marvell Armada AP806 System Controller +====================================== + +The AP806 is one of the two core HW blocks of the Marvell Armada 7K/8K +SoCs. It contains a system controller, which provides a number +registers giving access to numerous features: clocks, pin-muxing and +many other SoC configuration items. This DT binding allows to describe +this system controller. + +The Device Tree node representing the AP806 system controller provides +a number of clocks: + + - 0: clock of CPU cluster 0 + - 1: clock of CPU cluster 1 + - 2: fixed PLL at 1200 Mhz + - 3: MSS clock, derived from the fixed PLL + +Required properties: + + - compatible: must be: + "marvell,ap806-system-controller", "syscon" + - reg: register area of the AP806 system controller + - #clock-cells: must be set to 1 + - clock-output-names: must be defined to: + "cpu-cluster-0", "cpu-cluster-1", "fixed", "mss" + +Example: + + syscon: system-controller@6f4000 { + compatible = "marvell,ap806-system-controller", "syscon"; + #clock-cells = <1>; + clock-output-names = "cpu-cluster-0", "cpu-cluster-1", "fixed", "mss"; + reg = <0x6f4000 0x1000>; + };