From patchwork Wed Feb 24 15:14:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 587494 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 81D9A140AF3 for ; Thu, 25 Feb 2016 02:14:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753281AbcBXPOi (ORCPT ); Wed, 24 Feb 2016 10:14:38 -0500 Received: from down.free-electrons.com ([37.187.137.238]:40872 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751974AbcBXPOh (ORCPT ); Wed, 24 Feb 2016 10:14:37 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id CBF84B35; Wed, 24 Feb 2016 16:14:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (AToulouse-657-1-984-111.w86-217.abo.wanadoo.fr [86.217.138.111]) by mail.free-electrons.com (Postfix) with ESMTPSA id 92E4011D; Wed, 24 Feb 2016 16:14:35 +0100 (CET) From: Thomas Petazzoni To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala Cc: Nadav Haklai , Lior Amsalem , Neta Zur Hershkovits , Yehuda Yitschak , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni Subject: [PATCH v2 1/6] dt-bindings: arm/marvell: add DT bindings for AP806 DFX Server Date: Wed, 24 Feb 2016 16:14:21 +0100 Message-Id: <1456326866-30854-2-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1456326866-30854-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1456326866-30854-1-git-send-email-thomas.petazzoni@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The following patch adds a Device Tree binding documentation for the AP806 DFX Server register area found in Marvell Armada 7K/8K SOCs. Signed-off-by: Thomas Petazzoni --- .../bindings/arm/marvell/marvell,ap806-dfx-server.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,ap806-dfx-server.txt diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,ap806-dfx-server.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,ap806-dfx-server.txt new file mode 100644 index 0000000..44eb3f0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,ap806-dfx-server.txt @@ -0,0 +1,19 @@ +Marvell AP806 DFX Server +------------------------ + +The Marvell AP806 HW block (which is a core component of the Marvell +Armada 7K and 8K SOCs) has a set of registers called "DFX +Server". This set of registers contains miscellaneous registers, most +of them being used for silicon fine-tuning and manufacturing testing, +and as such are not publicly documented. However, this DFX server +register range also contains a few documented and useful registers, +for example for clock control. + +This Device Tree binding allows to represent the entire DFX server +register space as one single DT node. + +Required properties: +- compatible: the first and second values must be: + "simple-mfd", "syscon" +- reg: address and length of following register sets for the DFX + server