From patchwork Fri Dec 11 19:46:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 555892 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 34CC714029E for ; Sat, 12 Dec 2015 06:47:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753300AbbLKTrG (ORCPT ); Fri, 11 Dec 2015 14:47:06 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:33972 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751845AbbLKTqi (ORCPT ); Fri, 11 Dec 2015 14:46:38 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id tBBJkQwG005493; Fri, 11 Dec 2015 13:46:26 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id tBBJkQlJ019664; Fri, 11 Dec 2015 13:46:26 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Fri, 11 Dec 2015 13:46:25 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id tBBJkPg2028481; Fri, 11 Dec 2015 13:46:25 -0600 Received: from localhost (uda0226330.am.dhcp.ti.com [128.247.8.252]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id tBBJkP905648; Fri, 11 Dec 2015 13:46:25 -0600 (CST) From: "Andrew F. Davis" To: Linus Walleij , Alexandre Courbot , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala CC: , , , "Andrew F. Davis" Subject: [PATCH 1/2] dt-bindings: GPIO: Add generic serializer binding Date: Fri, 11 Dec 2015 13:46:23 -0600 Message-ID: <1449863184-29668-2-git-send-email-afd@ti.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1449863184-29668-1-git-send-email-afd@ti.com> References: <1449863184-29668-1-git-send-email-afd@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for generic parallel-in/serial-out shift register devices used as GPIO. Signed-off-by: Andrew F. Davis --- .../devicetree/bindings/gpio/gpio-pisosr.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-pisosr.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt b/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt new file mode 100644 index 0000000..e69e8ec --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt @@ -0,0 +1,34 @@ +Generic Parallel-in/Serial-out Shift Register GPIO Driver + +This binding describes generic parallel-in/serial-out shift register +devices that can be used for GPI (General Purpose Input). This includes +SN74165 serial-out shift registers and the SN65HVS88x series of +industrial serializers. + +Required properties: + - compatible : Should be "pisosr-gpio". + - gpio-controller : Marks the device node as a GPIO controller. + - #gpio-cells : Should be two. For consumer use see gpio.txt. + +Optional properties: + - ngpios : Number of GPIO lines, default is 8. + - load-gpios : GPIO pin specifier attached to load enable, this + pin is pulsed before reading from the device to + load input pin values into the the device. + +For other required and optional properties of SPI slave +nodes please refer to ../spi/spi-bus.txt. + +Example: + + sn65hvs882@0 { + compatible = "pisosr-gpio"; + gpio-controller; + #gpio-cells = <2>; + + load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + };