From patchwork Sat Oct 17 17:23:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Coquelin X-Patchwork-Id: 531821 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 80F101402B0 for ; Sun, 18 Oct 2015 04:27:02 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=fmXUOWOs; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932093AbbJQR0s (ORCPT ); Sat, 17 Oct 2015 13:26:48 -0400 Received: from mail-wi0-f196.google.com ([209.85.212.196]:34656 "EHLO mail-wi0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932373AbbJQRYE (ORCPT ); Sat, 17 Oct 2015 13:24:04 -0400 Received: by wicuk10 with SMTP id uk10so8510039wic.1; Sat, 17 Oct 2015 10:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7sQS8SE+g4qpsL0GFkUmo+5u9GjrrDv8Ba47iHMvIoo=; b=fmXUOWOsNHISFmEAzHJEdstOdhmvQmEkIbPbfyUYEbk+79XVZaUasknCqgHrQrQJOg 0iNxpW9cZbMnra8v8NOu1hd1q+MGuoKO7JGBbj0tAudq9UIW73nH0LrmXJo3n+j0stFi ENS+f1yGbgl2VZCO2cXqxXuPqDKcvJHckwAmj9R9S+ceDczkq2xYrhm2rw13MZLpxf+L IG8x5EwaeH1Wu7e1p4TZHA+J3gf/yOtOxdmnIyzIEf5OuHIMs6OWkjHmO0P6XBHxByBr T5xs6P/MizzE/xkRSLgWOGVbKKY+9tjyWhR99mCMNy0oiFm110E3Fyk+UeXoNvOIrMqP ctFA== X-Received: by 10.180.221.228 with SMTP id qh4mr11034618wic.89.1445102643378; Sat, 17 Oct 2015 10:24:03 -0700 (PDT) Received: from lmecul0520.st.com. (101.210.139.88.rev.sfr.net. [88.139.210.101]) by smtp.gmail.com with ESMTPSA id gh9sm29409201wjb.27.2015.10.17.10.24.02 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 17 Oct 2015 10:24:03 -0700 (PDT) From: Maxime Coquelin To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Linus Walleij , Mark Rutland , Rob Herring , linux-gpio@vger.kernel.org, arnd@arndb.de Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, afaerber@suse.de, devicetree@vger.kernel.org, Daniel Thompson , bruherrera@gmail.com Subject: [PATCH 1/9] Documentation: dt-bindings: Document STM32 EXTI controller bindings Date: Sat, 17 Oct 2015 19:23:50 +0200 Message-Id: <1445102638-11575-2-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445102638-11575-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1445102638-11575-1-git-send-email-mcoquelin.stm32@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Maxime Coquelin --- .../bindings/interrupt-controller/st,stm32-exti.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt new file mode 100644 index 0000000..6e7703d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt @@ -0,0 +1,20 @@ +STM32 External Interrupt Controller + +Required properties: + +- compatible: Should be "st,stm32-exti" +- reg: Specifies base physical address and size of the registers +- interrupt-controller: Indentifies the node as an interrupt controller +- #interrupt-cells: Specifies the number of cells to encode an interrupt + specifier, shall be 2 +- interrupts: interrupts references to primary interrupt controller + +Example: + +exti: interrupt-controller@40013c00 { + compatible = "st,stm32-exti"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x40013C00 0x400>; + interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>; +};