From patchwork Fri Oct 2 17:56:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 525691 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DA72514030F for ; Sat, 3 Oct 2015 03:58:09 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753310AbbJBR5i (ORCPT ); Fri, 2 Oct 2015 13:57:38 -0400 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:63124 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752407AbbJBR5g (ORCPT ); Fri, 2 Oct 2015 13:57:36 -0400 X-IronPort-AV: E=Sophos;i="5.17,624,1437462000"; d="scan'208";a="76648848" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 02 Oct 2015 11:24:48 -0700 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.235.1; Fri, 2 Oct 2015 10:57:35 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.235.1; Fri, 2 Oct 2015 10:57:34 -0700 Received: from anup-HP-Compaq-8100-Elite-CMT-PC.ban.broadcom.com (unknown [10.131.91.107]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id D986040FE5; Fri, 2 Oct 2015 10:54:41 -0700 (PDT) From: Anup Patel To: CC: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , Kumar Gala , "Catalin Marinas" , Will Deacon , "David Woodhouse" , Brian Norris , Ray Jui , Scott Branden , "Florian Fainelli" , Pramod KUMAR , "Vikram Prakash" , Sandeep Tripathy , , , , , Anup Patel Subject: [PATCH 4/5] Documentation: dt-bindings: Add info about brcm, nand-iproc-reset DT flag Date: Fri, 2 Oct 2015 23:26:45 +0530 Message-ID: <1443808606-21203-5-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1443808606-21203-1-git-send-email-anup.patel@broadcom.com> References: <1443808606-21203-1-git-send-email-anup.patel@broadcom.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch updates the BRCM NAND controller DT bindings documentation to add info about newly added optional flag "brcm,nand-iproc-reset". Signed-off-by: Anup Patel Reviewed-by: Pramod KUMAR Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt index 4ff7128..19b7a3c 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt @@ -78,6 +78,10 @@ we define additional 'compatible' properties and associated register resources w for interrupt status/ack. - reg-names: (required) a list of the names corresponding to the previous register ranges. Should contain "iproc-idm" and "iproc-ext". + - brcm,nand-iproc-reset: (optional) Some of the Broadcom IPROC SoCs + require NAND controller to be resetted for cleanup of previously + configured NAND controller state. This optional flag resets the + NAND controller once before any NAND commands are issued. * NAND chip-select