From patchwork Wed Apr 1 10:09:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 457205 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A14261401AD for ; Wed, 1 Apr 2015 21:10:05 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750887AbbDAKKD (ORCPT ); Wed, 1 Apr 2015 06:10:03 -0400 Received: from gloria.sntech.de ([95.129.55.99]:49738 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752824AbbDAKJ5 (ORCPT ); Wed, 1 Apr 2015 06:09:57 -0400 Received: from ip92344031.dynamic.kabel-deutschland.de ([146.52.64.49] helo=diego.lan) by gloria.sntech.de with esmtpsa (TLS1.1:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1YdFar-0002on-Fb; Wed, 01 Apr 2015 12:09:53 +0200 From: Heiko Stuebner To: airlied@linux.ie, mark.yao@rock-chips.com, laurent.pinchart@ideasonboard.com Cc: robdclark@gmail.com, djkurtz@chromium.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Yao , Heiko Stuebner Subject: [PATCH RFC v2 06/12] dt-bindings: Add documentation for rockchip lvds Date: Wed, 1 Apr 2015 12:09:40 +0200 Message-Id: <1427882986-19110-7-git-send-email-heiko@sntech.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427882986-19110-1-git-send-email-heiko@sntech.de> References: <1427882986-19110-1-git-send-email-heiko@sntech.de> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Mark Yao Add binding documentation for Rockchip SoC LVDS driver. Signed-off-by: Mark Yao Signed-off-by: Heiko Stuebner --- .../devicetree/bindings/video/rockchip-lvds.txt | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/rockchip-lvds.txt diff --git a/Documentation/devicetree/bindings/video/rockchip-lvds.txt b/Documentation/devicetree/bindings/video/rockchip-lvds.txt new file mode 100644 index 0000000..80529f4 --- /dev/null +++ b/Documentation/devicetree/bindings/video/rockchip-lvds.txt @@ -0,0 +1,74 @@ +Rockchip RK3288 LVDS interface +================================ + +Required properties: +- compatible: "rockchip,rk3288-lvds"; + +- reg: physical base address of the controller and length + of memory mapped region. +- clocks: must include clock specifiers corresponding to entries in the + clock-names property. +- clock-names: must contain "pclk_lvds" + +- avdd1v0-supply: regulator phandle for 1.0V analog power +- avdd1v8-supply: regulator phandle for 1.8V analog power +- avdd3v3-supply: regulator phandle for 3.3V analog power + +- rockchip,grf: phandle to the general register files syscon + +- rockchip,data-mapping: should be "vesa" or "jeida", + This describes how the color bits are laid out in the + serialized LVDS signal. +- rockchip,data-width : should be <18> or <24>; +- rockchip,output: should be "rgb", "lvds" or "duallvds", + This describes the output face. + +Required nodes: + +The lvds has two video ports as described by + Documentation/devicetree/bindings/media/video-interfaces.txt. +Their connections are modeled using the OF graph bindings specified in + Documentation/devicetree/bindings/graph.txt. + +- video port 0 for the VOP inputs +- video port 1 for either a panel or subsequent encoder + +Example: + lvds: lvds@ff96c000 { + compatible = "rockchip,rk3288-lvds"; + rockchip,grf = <&grf>; + reg = <0xff96c000 0x4000>; + clocks = <&cru PCLK_LVDS_PHY>; + clock-names = "pclk_lvds"; + avdd1v0-supply = <&vdd10_lcd>; + avdd1v8-supply = <&vcc18_lcd>; + avdd3v3-supply = <&vcca_33>; + rockchip,data-mapping = "jeida"; + rockchip,data-width = <24>; + rockchip,output = "rgb"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + lvds_in: port@0 { + reg = <0>; + + lvds_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_lvds>; + }; + lvds_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_lvds>; + }; + }; + + lvds_out: port@1 { + reg = <1>; + + lvds_out_panel: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };