From patchwork Fri Dec 26 07:09:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Flora Fu X-Patchwork-Id: 424096 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D4AA8140082 for ; Fri, 26 Dec 2014 18:11:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751668AbaLZHKO (ORCPT ); Fri, 26 Dec 2014 02:10:14 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:52537 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751574AbaLZHKJ (ORCPT ); Fri, 26 Dec 2014 02:10:09 -0500 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1788334397; Fri, 26 Dec 2014 15:10:07 +0800 Received: from mtksdtcf04.mediatek.inc (10.21.12.144) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 26 Dec 2014 15:10:06 +0800 From: Flora Fu To: Rob Herring , Matthias Brugger , Samuel Ortiz , Lee Jones , , Arnd Bergmann CC: Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Grant Likely , , , , , Sascha Hauer , Olof Johansson , Flora Fu , Eddie Huang , Yingjoe Chen , Dongdong Cheng , HenryC Chen , Menghui Lin , Chen Zhong Subject: [PATCH v4 3/6] dt-bindings:: Add document for MT8135 PMIC Wrapper Date: Fri, 26 Dec 2014 15:09:25 +0800 Message-ID: <1419577768-12037-4-git-send-email-flora.fu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1419577768-12037-1-git-send-email-flora.fu@mediatek.com> References: <1419577768-12037-1-git-send-email-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Flora Fu --- .../soc/mediatek/mediatek,mt8135-pwrap.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt new file mode 100644 index 0000000..d630fa0 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt @@ -0,0 +1,51 @@ +MediaTek MT8135 PMIC Wrapper Driver + +MediaTek PMIC MFD is interfaced to host controller using SPI interface +by a proprietary hardware called PMIC wrapper or pwrap. + ++-----------------+ +---------------+ +| | | | +| Mediatek AP SoC | | | +| (ex. MT8135) | | MT6397 | +| | | | +| +--------+ | (SPI bus) | +--------+ | +| | | |-----------| | | | +| | PMIC | |-----------| | PMIC | | +| | Wrapper| |-----------| | Wrapper| | +| | | |-----------| | | | +| +--------+ | | +--------+ | +| | | | ++-----------------+ +---------------+ + +This document describes the binding for MT8135 PMIC wrapper. + +Required properties in pwrap device node. +- compatible:"mediatek,mt8135-pwrap" +- interrupts: IRQ for pwrap in SOC +- reg: address range for pwrap registers +- resets: reset bit for pwrap +- clock: clock frequency selection in SPI bus + +Optional properities: +- pmic: Mediatek PMIC MFD is the child device of pwrap + See the following for child node definitions: + Documentation/devicetree/bindings/mfd/mt6397.txt + +Example: + pwrap: pwrap@1000f000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, + <0 0x11017000 0 0x1000>; + reg-names = "pwrap-base", "pwrap-bridge-base"; + interrupts = ; + resets = <&infrarst MT8135_INFRA_PMIC_WRAP_RST>, + <&perirst MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "infra-pwrap-rst", + "peri-pwrap-bridge-rst"; + clocks = <&pmicspi_sel>, <&clk26m>; + clock-names = "pmicspi-sel", "pmicspi-parent"; + + pmic { + compatible = "mediatek,mt6397"; + }; + };