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+MediaTek MT8135 PMIC Wrapper Driver
+
+MediaTek PMIC MFD is interfaced to host controller using SPI interface
+by a proprietary hardware called PMIC wrapper or pwrap.
+
++-----------------+ +---------------+
+| | | |
+| Mediatek AP SoC | | |
+| (ex. MT8135) | | MT6397 |
+| | | |
+| +--------+ | (SPI bus) | +--------+ |
+| | | |-----------| | | |
+| | PMIC | |-----------| | PMIC | |
+| | Wrapper| |-----------| | Wrapper| |
+| | | |-----------| | | |
+| +--------+ | | +--------+ |
+| | | |
++-----------------+ +---------------+
+
+This document describes the binding for MT8135 PMIC wrapper.
+
+Required properties in pwrap device node.
+- compatible:"mediatek,mt8135-pwrap"
+- interrupts: IRQ for pwrap in SOC
+- reg: address range for pwrap registers
+- resets: reset bit for pwrap
+- clock: clock frequency selection in SPI bus
+
+Optional properities:
+- pmic: Mediatek PMIC MFD is the child device of pwrap
+ See the following for child node definitions:
+ Documentation/devicetree/bindings/mfd/mt6397.txt
+
+Example:
+ pwrap: pwrap@1000f000 {
+ compatible = "mediatek,mt8135-pwrap";
+ reg = <0 0x1000f000 0 0x1000>,
+ <0 0x11017000 0 0x1000>;
+ reg-names = "pwrap-base", "pwrap-bridge-base";
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&infrarst MT8135_INFRA_PMIC_WRAP_RST>,
+ <&perirst MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
+ reset-names = "infra-pwrap-rst",
+ "peri-pwrap-bridge-rst";
+ clocks = <&pmicspi_sel>, <&clk26m>;
+ clock-names = "pmicspi-sel", "pmicspi-parent";
+
+ pmic {
+ compatible = "mediatek,mt6397";
+ };
+ };
Signed-off-by: Flora Fu <flora.fu@mediatek.com> --- .../soc/mediatek/mediatek,mt8135-pwrap.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt