From patchwork Fri Nov 21 15:59:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 413099 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DE8BB1400E9 for ; Sat, 22 Nov 2014 03:00:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755473AbaKUQAY (ORCPT ); Fri, 21 Nov 2014 11:00:24 -0500 Received: from down.free-electrons.com ([37.187.137.238]:56315 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758177AbaKUQAX (ORCPT ); Fri, 21 Nov 2014 11:00:23 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id 482A32F4; Fri, 21 Nov 2014 17:00:23 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id D5EDA299; Fri, 21 Nov 2014 17:00:22 +0100 (CET) From: Thomas Petazzoni To: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Cc: linux-arm-kernel@lists.infradead.org, Tawfik Bayouk , Nadav Haklai , Lior Amsalem , Ezequiel Garcia , devicetree@vger.kernel.org, Thomas Petazzoni , Kumar Gala , Ian Campbell , Mark Rutland , Rob Herring Subject: [PATCHv3 01/16] Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller Date: Fri, 21 Nov 2014 16:59:58 +0100 Message-Id: <1416585613-2113-2-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1416585613-2113-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1416585613-2113-1-git-send-email-thomas.petazzoni@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The suspend/resume code for Armada XP has to modify certain registers of the SDRAM controller. Therefore, we need to define a Device Tree binding for this hardware block. Signed-off-by: Thomas Petazzoni Cc: devicetree@vger.kernel.org Cc: Kumar Gala Cc: Ian Campbell Cc: Mark Rutland Cc: Rob Herring Reviewed-by: Gregory CLEMENT --- .../memory-controllers/mvebu-sdram-controller.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt new file mode 100644 index 0000000..89657d1 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt @@ -0,0 +1,21 @@ +Device Tree bindings for MVEBU SDRAM controllers + +The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller +differs from one SoC variant to another, but they also share a number +of commonalities. + +For now, this Device Tree binding documentation only documents the +Armada XP SDRAM controller. + +Required properties: + + - compatible: for Armada XP, "marvell,armada-xp-sdram-controller" + - reg: a resource specifier for the register space, which should + include all SDRAM controller registers as per the datasheet. + +Example: + +sdramc@1400 { + compatible = "marvell,armada-xp-sdram-controller"; + reg = <0x1400 0x500>; +};