From patchwork Thu Oct 23 15:18:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 402558 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 9408914009A for ; Fri, 24 Oct 2014 02:19:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755376AbaJWPTw (ORCPT ); Thu, 23 Oct 2014 11:19:52 -0400 Received: from mail-yh0-f49.google.com ([209.85.213.49]:48024 "EHLO mail-yh0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754412AbaJWPTL (ORCPT ); Thu, 23 Oct 2014 11:19:11 -0400 Received: by mail-yh0-f49.google.com with SMTP id a41so1034477yho.22 for ; Thu, 23 Oct 2014 08:19:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WQVOjCPuuHLO6QLR/RPSwQQeIWZuHnrahAS1WPluzck=; b=NxqRdVY56tuCJMcXyoAORp+gFCg7DiI/MP/5JJk3d+7UsNFYcQXghvi7J0M31pcTQ/ K0SYNfCaDLzG6gxctZyxtQWbRAA5RuXQ79Mp+dHYivVp3ZdWMrWtZNgiZ2NRxL3emrcq vkPSzwaGJEYwg6yV4HtBXMxVcnc+66Tyn+bF1MF29YDKeTDY6IXZo7V3r6dJy4cyYw9H HCFIY3WmeUZ+W3rO18mSiWzeISubG2ykhz6YkO57TdTxhzn5Xx+/L1yJNOtzZSKVSY9K 4PkMdNmcCnLycPknFlhQRBTVMGzmwh97OFaJpvgyu1q7PbLKsT+C0BDERLsYqdaa58ig Uagg== X-Gm-Message-State: ALoCoQkQos0hP2IbSdQo+hW9l3bcdvjGy586bEKNtnlXS4MRM6gv6lnDyDkdSg18QbIEnRDwM1G6 X-Received: by 10.170.79.65 with SMTP id v62mr405260ykv.18.1414077550928; Thu, 23 Oct 2014 08:19:10 -0700 (PDT) Received: from localhost.localdomain (host109-148-232-230.range109-148.btcentralplus.com. [109.148.232.230]) by mx.google.com with ESMTPSA id jd6sm1219612igb.16.2014.10.23.08.19.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 Oct 2014 08:19:10 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, wim@iguana.be, linux-watchdog@vger.kernel.org, linux@roeck-us.net Cc: lee.jones@linaro.org, kernel@stlinux.com, devicetree@vger.kernel.org, David Paris Subject: [PATCH 3/4] watchdog: st_wdt: Provide binding documentation for ST's LPC Watchdog driver Date: Thu, 23 Oct 2014 16:18:43 +0100 Message-Id: <1414077524-6469-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414077524-6469-1-git-send-email-lee.jones@linaro.org> References: <1414077524-6469-1-git-send-email-lee.jones@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: David Paris Signed-off-by: Lee Jones --- .../devicetree/bindings/watchdog/st-lpc-wdt.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/st-lpc-wdt.txt diff --git a/Documentation/devicetree/bindings/watchdog/st-lpc-wdt.txt b/Documentation/devicetree/bindings/watchdog/st-lpc-wdt.txt new file mode 100644 index 0000000..2d0328b --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/st-lpc-wdt.txt @@ -0,0 +1,31 @@ +STMicroelectronics LPC Watchdog +=============================== + +Required properties + +- compatible : Must be one of: + "st,stih407-watchdog" + "st,stih416-watchdog" + "st,stih415-watchdog" + "st,stid127-watchdog" +- reg : LPC registers base address + size +- reg-names : Register map "base" and "syscfg-en" are compulsory. + "syscfg-type" is platform dependent and not required for the + STiH407 +- clock-names : Should be "lpc_wdt" +- clocks : Clock used by LPC device +- timeout-sec : Watchdog timeout in seconds +- st,syscfg : Syscfg node used to configure CPU reset type and mask +- st,warm_reset : If present, reset type will be 'warm'. If not, it will be cold + +Example: + watchdog@fde05000 { + compatible = "st,stih416-lpc-watchdog"; + reg = <0xfde05000 0x1000> <0x204 0x4>; + reg-names = "base", "syscfg-en" + clock-names = "lpc_wdt"; + clocks = <&clk_s_d3_flexgen CLK_LPC_0>; + timeout-sec = <600>; + st,syscfg = <&syscfg_core>; + st,warm_reset; + };