From patchwork Sat Sep 6 01:26:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 386576 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D15291400B6 for ; Sat, 6 Sep 2014 11:26:52 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750826AbaIFB0v (ORCPT ); Fri, 5 Sep 2014 21:26:51 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:43877 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750762AbaIFB0v (ORCPT ); Fri, 5 Sep 2014 21:26:51 -0400 Received: from penelope.isobedori.kobe.vergenet.net (101-140-171-142f1.hyg1.eonet.ne.jp [101.140.171.142]) by kirsty.vergenet.net (Postfix) with ESMTP id 1547925BF6F; Sat, 6 Sep 2014 11:26:43 +1000 (EST) Received: by penelope.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 242997C0272; Sat, 6 Sep 2014 10:26:45 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , devicetree@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven , Mark Rutland , Sergei Shtylyov , Simon Horman Subject: [PATCH v3 3/3] clocksource: sh_tmu: Document r8a7779 binding Date: Sat, 6 Sep 2014 10:26:30 +0900 Message-Id: <1409966790-17683-4-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1409966790-17683-1-git-send-email-horms+renesas@verge.net.au> References: <1409966790-17683-1-git-send-email-horms+renesas@verge.net.au> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for a number of drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car Timer Unit (TMU) driver to follow this convention. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart --- * I plan to follow up with a patch patch to use the new binding in the dtsi files for the r8a7779 SoC. commit 471269b790aec03385dc4fb127ed7094ff83c16d v2 * Suggestions by Mark Rutland and Sergei Shtylyov - Compatible strings should be "one or more" not "one" of those listed - Describe the generic binding as covering any MTU2 device - Re-order compat strings from most to least specific v3 * Suggested by Laurent Pinchart - Reword in keeping with a similar though more extensive patch for CMT --- Documentation/devicetree/bindings/timer/renesas,tmu.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.txt b/Documentation/devicetree/bindings/timer/renesas,tmu.txt index 425d0c5..7db89fb 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.txt +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.txt @@ -8,7 +8,10 @@ are independent. The TMU hardware supports up to three channels. Required Properties: - - compatible: must contain "renesas,tmu" + - compatible: must contain one or more of the following: + - "renesas,tmu-r8a7779" for the r8a7779 TMU + - "renesas,tmu" for any TMU. + This is a fallback for the above renesas,tmu-* entries - reg: base address and length of the registers block for the timer module. @@ -27,7 +30,7 @@ Optional Properties: Example: R8A7779 (R-Car H1) TMU0 node tmu0: timer@ffd80000 { - compatible = "renesas,tmu"; + compatible = "renesas,tmu-r8a7779", "renesas,tmu"; reg = <0xffd80000 0x30>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>,