From patchwork Tue Aug 19 04:38:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiubo Li X-Patchwork-Id: 381228 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 33B171400B2 for ; Tue, 19 Aug 2014 14:43:32 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752720AbaHSEnb (ORCPT ); Tue, 19 Aug 2014 00:43:31 -0400 Received: from mail-bn1blp0182.outbound.protection.outlook.com ([207.46.163.182]:44082 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751624AbaHSEnb (ORCPT ); Tue, 19 Aug 2014 00:43:31 -0400 Received: from CH1PR03CA010.namprd03.prod.outlook.com (10.255.156.155) by BN1PR0301MB0611.namprd03.prod.outlook.com (25.160.170.26) with Microsoft SMTP Server (TLS) id 15.0.1010.18; Tue, 19 Aug 2014 04:43:22 +0000 Received: from BY2FFO11FD026.protection.gbl (10.255.156.132) by CH1PR03CA010.outlook.office365.com (10.255.156.155) with Microsoft SMTP Server (TLS) id 15.0.1010.18 via Frontend Transport; Tue, 19 Aug 2014 04:43:21 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD026.mail.protection.outlook.com (10.1.15.215) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Tue, 19 Aug 2014 04:43:21 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s7J4h8kn007905; Mon, 18 Aug 2014 21:43:18 -0700 From: Xiubo Li To: CC: , , , , , , , Xiubo Li , Varka Bhadram Subject: [PATCH 2/3] Document: fsl, esai: Adjust the document making it read more comfortably. Date: Tue, 19 Aug 2014 12:38:57 +0800 Message-ID: <1408423138-19880-3-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1408423138-19880-1-git-send-email-Li.Xiubo@freescale.com> References: <1408423138-19880-1-git-send-email-Li.Xiubo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019006)(6009001)(189002)(199003)(83322001)(80022001)(85306004)(86362001)(74662001)(89996001)(93916002)(77982001)(50226001)(31966008)(76482001)(19580395003)(76176999)(68736004)(84676001)(64706001)(62966002)(6806004)(92566001)(50986999)(97736001)(44976005)(46102001)(102836001)(92726001)(77156001)(19580405001)(20776003)(99396002)(87286001)(107046002)(85852003)(47776003)(2351001)(229853001)(106466001)(105606002)(104166001)(21056001)(26826002)(50466002)(95666004)(104016003)(88136002)(81542001)(74502001)(4396001)(83072002)(81342001)(87936001)(110136001)(36756003)(79102001)(48376002)(142933001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR0301MB0611; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0308EE423E Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Li.Xiubo@freescale.com; X-OriginatorOrg: freescale.com Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Xiubo Li Cc: Varka Bhadram Reviewed-by: Varka Bhadram --- .../devicetree/bindings/sound/fsl,esai.txt | 73 ++++++++++++---------- 1 file changed, 39 insertions(+), 34 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt index aeb8c4a..4dce656 100644 --- a/Documentation/devicetree/bindings/sound/fsl,esai.txt +++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt @@ -7,49 +7,54 @@ other DSPs. It has up to six transmitters and four receivers. Required properties: - - compatible : Compatible list, must contain "fsl,imx35-esai". +- compatible: Compatible list, must contain "fsl,imx35-esai". - - reg : Offset and length of the register set for the device. +- reg: Offset and length of the register set for the device. - - interrupts : Contains the spdif interrupt. +- interrupts: Contains the spdif interrupt. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. +- dmas: Generic dma devicetree binding as described in + Documentation/devicetree/bindings/dma/dma.txt. - - dma-names : Two dmas have to be defined, "tx" and "rx". +- dma-names: Two dmas have to be defined, "tx" and "rx". - - clocks: Contains an entry for each entry in clock-names. +- clocks: Contains an entry for each entry in clock-names. - - clock-names : Includes the following entries: - "core" The core clock used to access registers - "extal" The esai baud clock for esai controller used to derive - HCK, SCK and FS. - "fsys" The system clock derived from ahb clock used to derive - HCK, SCK and FS. +- clock-names: Includes the following entries: + "core" -- The core clock used to access registers + "extal"-- The esai baud clock for esai controller used to + derive HCK, SCK and FS. + "fsys" -- The system clock derived from ahb clock used to + derive HCK, SCK and FS. - - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. - This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM]. +- fsl,fifo-depth: + The number of elements in the transmit and receive FIFOs. + This number is the maximum allowed value for TFCR[TFWM] or + RFCR[RFWM]. - - fsl,esai-synchronous: This is a boolean property. If present, indicating - that ESAI would work in the synchronous mode, which means all the settings - for Receiving would be duplicated from Transmition related registers. +- fsl,esai-synchronous: + This is a boolean property. If present, indicating that ESAI + would work in the synchronous mode, which means all the settings + for Receiving would be duplicated from Transmition related + registers. - - big-endian : If this property is absent, the native endian mode will - be in use as default, or the big endian mode will be in use for all the - device registers. +- big-endian: + If this property is absent, the native endian mode will be in + use as default, or the big endian mode will be in use for all the + device registers. Example: -esai: esai@02024000 { - compatible = "fsl,imx35-esai"; - reg = <0x02024000 0x4000>; - interrupts = <0 51 0x04>; - clocks = <&clks 208>, <&clks 118>, <&clks 208>; - clock-names = "core", "extal", "fsys"; - dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; - dma-names = "rx", "tx"; - fsl,fifo-depth = <128>; - fsl,esai-synchronous; - big-endian; - status = "disabled"; -}; + esai: esai@02024000 { + compatible = "fsl,imx35-esai"; + reg = <0x02024000 0x4000>; + interrupts = <0 51 0x04>; + clocks = <&clks 208>, <&clks 118>, <&clks 208>; + clock-names = "core", "extal", "fsys"; + dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; + dma-names = "rx", "tx"; + fsl,fifo-depth = <128>; + fsl,esai-synchronous; + big-endian; + status = "disabled"; + };