From patchwork Tue Aug 19 04:38:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiubo Li X-Patchwork-Id: 381226 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F0E931400B2 for ; Tue, 19 Aug 2014 14:43:29 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752723AbaHSEn3 (ORCPT ); Tue, 19 Aug 2014 00:43:29 -0400 Received: from mail-bn1blp0181.outbound.protection.outlook.com ([207.46.163.181]:23006 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752600AbaHSEn2 (ORCPT ); Tue, 19 Aug 2014 00:43:28 -0400 Received: from BN3PR0301CA0064.namprd03.prod.outlook.com (25.160.152.160) by CY1PR0301MB0617.namprd03.prod.outlook.com (25.160.142.24) with Microsoft SMTP Server (TLS) id 15.0.1005.10; Tue, 19 Aug 2014 04:43:19 +0000 Received: from BY2FFO11FD021.protection.gbl (2a01:111:f400:7c0c::191) by BN3PR0301CA0064.outlook.office365.com (2a01:111:e400:401e::32) with Microsoft SMTP Server (TLS) id 15.0.1010.18 via Frontend Transport; Tue, 19 Aug 2014 04:43:18 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD021.mail.protection.outlook.com (10.1.15.210) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Tue, 19 Aug 2014 04:43:18 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s7J4h8km007905; Mon, 18 Aug 2014 21:43:14 -0700 From: Xiubo Li To: CC: , , , , , , , Xiubo Li , Varka Bhadram Subject: [PATCH 1/3] Document: fsl, spdif: Adjust the document making it read more comfortably. Date: Tue, 19 Aug 2014 12:38:56 +0800 Message-ID: <1408423138-19880-2-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1408423138-19880-1-git-send-email-Li.Xiubo@freescale.com> References: <1408423138-19880-1-git-send-email-Li.Xiubo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019006)(6009001)(199003)(189002)(105606002)(87286001)(2351001)(74662001)(76176999)(50986999)(86362001)(93916002)(88136002)(95666004)(74502001)(46102001)(104166001)(76482001)(48376002)(20776003)(47776003)(84676001)(64706001)(50226001)(81542001)(21056001)(87936001)(31966008)(81342001)(92566001)(77982001)(79102001)(89996001)(62966002)(83072002)(36756003)(19580405001)(44976005)(102836001)(229853001)(80022001)(19580395003)(85852003)(83322001)(77156001)(68736004)(6806004)(97736001)(92726001)(110136001)(50466002)(4396001)(106466001)(104016003)(85306004)(107046002)(26826002)(99396002)(142933001); DIR:OUT; SFP:1102; SCL:1; SRVR:CY1PR0301MB0617; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0308EE423E Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Li.Xiubo@freescale.com; X-OriginatorOrg: freescale.com Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Xiubo Li Cc: Varka Bhadram Reviewed-by: Varka Bhadram --- .../devicetree/bindings/sound/fsl,spdif.txt | 82 +++++++++++----------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.txt b/Documentation/devicetree/bindings/sound/fsl,spdif.txt index 3e9e82c8..d37bfc2 100644 --- a/Documentation/devicetree/bindings/sound/fsl,spdif.txt +++ b/Documentation/devicetree/bindings/sound/fsl,spdif.txt @@ -6,54 +6,54 @@ a fibre cable. Required properties: - - compatible : Compatible list, must contain "fsl,imx35-spdif". +- compatible: Compatible list, must contain "fsl,imx35-spdif". - - reg : Offset and length of the register set for the device. +- reg: Offset and length of the register set for the device. - - interrupts : Contains the spdif interrupt. +- interrupts: Contains the spdif interrupt. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. +- dmas: Generic dma devicetree binding as described in + Documentation/devicetree/bindings/dma/dma.txt. - - dma-names : Two dmas have to be defined, "tx" and "rx". +- dma-names: Two dmas have to be defined, "tx" and "rx". - - clocks : Contains an entry for each entry in clock-names. +- clocks: Contains an entry for each entry in clock-names. - - clock-names : Includes the following entries: - "core" The core clock of spdif controller - "rxtx<0-7>" Clock source list for tx and rx clock. - This clock list should be identical to - the source list connecting to the spdif - clock mux in "SPDIF Transceiver Clock - Diagram" of SoC reference manual. It - can also be referred to TxClk_Source - bit of register SPDIF_STC. +- clock-names: Includes the following entries: + "core" -- The core clock of spdif controller + "rxtx<0-7>" -- Clock source list for tx and rx clock. + This clock list should be identical to + the source list connecting to the spdif + clock mux in "SPDIF Transceiver Clock + Diagram" of SoC reference manual. It + can also be referred to TxClk_Source + bit of register SPDIF_STC. - - big-endian : If this property is absent, the native endian mode will - be in use as default, or the big endian mode will be in use for all the - device registers. +- big-endian: If this property is absent, the native endian mode will + be in use as default, or the big endian mode will be in + use for all the device registers. Example: -spdif: spdif@02004000 { - compatible = "fsl,imx35-spdif"; - reg = <0x02004000 0x4000>; - interrupts = <0 52 0x04>; - dmas = <&sdma 14 18 0>, - <&sdma 15 18 0>; - dma-names = "rx", "tx"; - - clocks = <&clks 197>, <&clks 3>, - <&clks 197>, <&clks 107>, - <&clks 0>, <&clks 118>, - <&clks 62>, <&clks 139>, - <&clks 0>; - clock-names = "core", "rxtx0", - "rxtx1", "rxtx2", - "rxtx3", "rxtx4", - "rxtx5", "rxtx6", - "rxtx7"; - - big-endian; - status = "okay"; -}; + spdif: spdif@02004000 { + compatible = "fsl,imx35-spdif"; + reg = <0x02004000 0x4000>; + interrupts = <0 52 0x04>; + dmas = <&sdma 14 18 0>, + <&sdma 15 18 0>; + dma-names = "rx", "tx"; + + clocks = <&clks 197>, <&clks 3>, + <&clks 197>, <&clks 107>, + <&clks 0>, <&clks 118>, + <&clks 62>, <&clks 139>, + <&clks 0>; + clock-names = "core", "rxtx0", + "rxtx1", "rxtx2", + "rxtx3", "rxtx4", + "rxtx5", "rxtx6", + "rxtx7"; + + big-endian; + status = "okay"; + };