From patchwork Thu May 22 09:17:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 351398 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 618EF140083 for ; Thu, 22 May 2014 19:19:51 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754251AbaEVJTf (ORCPT ); Thu, 22 May 2014 05:19:35 -0400 Received: from mail-pb0-f42.google.com ([209.85.160.42]:53572 "EHLO mail-pb0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754245AbaEVJTd (ORCPT ); Thu, 22 May 2014 05:19:33 -0400 Received: by mail-pb0-f42.google.com with SMTP id md12so2339979pbc.15 for ; Thu, 22 May 2014 02:19:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UVuKhGRUs/FrfplhU6G81GbyAMtGxxuy/+4hzQi6qhQ=; b=HXm9cxZM6ZPyr84fIxPYAkutJxKanG0ixid731BWHDj4kpc5sbokmb4B89shkYdHh5 Zbn9g+sZkzrUR83XR4TLH1qDgdPbMm6dOt3kp6XYAq5eRAHCKk99fmsz+2gJUln08Jp8 e/YrLtFVO953T6Q7qUP8MnhfWLGynlW43GG7GEK9KU+4BBgmUyOsgnifQkXNk1zm1Yby l5/+/6eM/SYozDOJBWHDoyYTgXao5/2rJyUViSLVtwWR8uXeZQIFAvfoVkK6GqF0rp7Y 7T83NoRcJ5AAIHs8pVcZBSgMMNNQTUWCpUoWsbWkQoKeiP9HZn/XpWGBh6reZ2sMh5YW 7d5Q== X-Gm-Message-State: ALoCoQl38XEr7ZknbGmNz7g7pDE7pkbafmBCMlC6e6u/moru1793g4cJqSXTOTHehHAFe4QNM64S X-Received: by 10.66.192.73 with SMTP id he9mr65981468pac.88.1400750372475; Thu, 22 May 2014 02:19:32 -0700 (PDT) Received: from linaro.sisodomain.com ([14.140.216.146]) by mx.google.com with ESMTPSA id im2sm12039249pbb.32.2014.05.22.02.19.25 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 May 2014 02:19:28 -0700 (PDT) From: Tushar Behera To: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: tiwai@suse.de, perex@perex.cz, broonie@kernel.org, dianders@chromium.org, jerry.wong@maximintegrated.com Subject: [PATCH 2/2] ASoC: max98095: Add master clock handling Date: Thu, 22 May 2014 14:47:08 +0530 Message-Id: <1400750228-13750-3-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1400750228-13750-1-git-send-email-tushar.behera@linaro.org> References: <1400750228-13750-1-git-send-email-tushar.behera@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If master clock is provided through device tree, then update the master clock frequency during set_sysclk. Documentation has been updated to reflect the change. Signed-off-by: Tushar Behera --- .../devicetree/bindings/sound/max98095.txt | 6 ++++++ sound/soc/codecs/max98095.c | 14 ++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/max98095.txt b/Documentation/devicetree/bindings/sound/max98095.txt index bacbeaa..318a4c8 100644 --- a/Documentation/devicetree/bindings/sound/max98095.txt +++ b/Documentation/devicetree/bindings/sound/max98095.txt @@ -8,6 +8,12 @@ Required properties: - reg : The I2C address of the device. +Optional properties: + +- clocks: The phandle of the master clock to the CODEC + +- clock-names: Should be "mclk" + Example: max98095: codec@11 { diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c index d6c1e4c..4d66b95 100644 --- a/sound/soc/codecs/max98095.c +++ b/sound/soc/codecs/max98095.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -42,6 +43,7 @@ struct max98095_priv { struct regmap *regmap; enum max98095_type devtype; struct max98095_pdata *pdata; + struct clk *mclk; unsigned int sysclk; struct max98095_cdata dai[3]; const char **eq_texts; @@ -1395,6 +1397,11 @@ static int max98095_dai_set_sysclk(struct snd_soc_dai *dai, if (freq == max98095->sysclk) return 0; + if (!IS_ERR(max98095->mclk)) { + freq = clk_round_rate(max98095->mclk, freq); + clk_set_rate(max98095->mclk, freq); + } + /* Setup clocks for slave mode, and using the PLL * PSCLK = 0x01 (when master clk is 10MHz to 20MHz) * 0x02 (when master clk is 20MHz to 40MHz).. @@ -2238,6 +2245,10 @@ static int max98095_probe(struct snd_soc_codec *codec) struct i2c_client *client; int ret = 0; + max98095->mclk = devm_clk_get(codec->dev, "mclk"); + if (!IS_ERR(max98095->mclk)) + clk_prepare_enable(max98095->mclk); + /* reset the codec, the DSP core, and disable all interrupts */ max98095_reset(codec); @@ -2340,6 +2351,9 @@ static int max98095_remove(struct snd_soc_codec *codec) if (max98095->headphone_jack || max98095->mic_jack) max98095_jack_detect_disable(codec); + if (!IS_ERR(max98095->mclk)) + clk_disable_unprepare(max98095->mclk); + if (client->irq) free_irq(client->irq, codec);