From patchwork Tue May 20 06:24:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pekon gupta X-Patchwork-Id: 350528 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 6E453140088 for ; Tue, 20 May 2014 16:24:58 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751454AbaETGY5 (ORCPT ); Tue, 20 May 2014 02:24:57 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:52664 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750763AbaETGY4 (ORCPT ); Tue, 20 May 2014 02:24:56 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s4K6Oagc024309; Tue, 20 May 2014 01:24:36 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4K6OZ0c018323; Tue, 20 May 2014 01:24:35 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Tue, 20 May 2014 01:24:35 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4K6OWLm027781; Tue, 20 May 2014 01:24:33 -0500 From: Pekon Gupta To: Tony Lindgren CC: linux-omap , Ezequiel Garcia , Stefan Roese , Javier Martinez Canillas , Roger Quadros , Pekon Gupta , Subject: [PATCH v2] ARM: OMAP2+: gpmc: enable wait-pin monitoring for NAND devices via DT Date: Tue, 20 May 2014 11:54:24 +0530 Message-ID: <1400567064-20033-1-git-send-email-pekon@ti.com> X-Mailer: git-send-email 1.8.5.1.163.gd7aced9 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch enables 'wait-pin' monitoring in NAND driver if following properties are present under NAND DT node gpmc,wait-pin = gpmc,wait-on-read gpmc,wait-on-write As NAND generic framework uses common path nand_chip->dev_ready() for monitoring completion of Read and Write status, so wait-pin monitoring is enabled only when *both* 'gpmc,wait-on-read' and 'gpmc,wait-on-write' are specified. CC: devicetree@vger.kernel.org Signed-off-by: Pekon Gupta --- Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++++++ arch/arm/mach-omap2/gpmc-nand.c | 8 +++++--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt index eb81435..4039032 100644 --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt @@ -45,6 +45,14 @@ Optional properties: ELM hardware engines should specify this device node in .dtsi Using ELM for ECC error correction frees some CPU cycles. + - gpmc,wait-pin= Specifies GPMC wait-pin number to monitor + - gpmc,wait-on-read Enable wait-pin monitoring for Read accesses + - gpmc,wait-on-write Enable wait-pin monitoring for Write accesses + As NAND generic framework uses single common function + nand_chip->dev_ready() for polling wait-pin both for Read and + Write accesses. So for NAND devices both 'gpmc,wait-on-read' and + 'gpmc,wait-on-write' need to be specified together. + For inline partiton table parsing (optional): - #address-cells: should be set to 1 diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 17cd393..62bc3de 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -123,11 +123,13 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, } } - if (gpmc_nand_data->of_node) + if (gpmc_nand_data->of_node) { gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); - else + if (s.wait_on_read && s.wait_on_write) + gpmc_nand_data->dev_ready = true; + } else { gpmc_set_legacy(gpmc_nand_data, &s); - + } s.device_nand = true; err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);