From patchwork Mon Apr 28 03:53:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 343229 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C3B2E1400D9 for ; Mon, 28 Apr 2014 14:52:22 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751925AbaD1EwW (ORCPT ); Mon, 28 Apr 2014 00:52:22 -0400 Received: from mail-bn1blp0187.outbound.protection.outlook.com ([207.46.163.187]:49972 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751592AbaD1EwV (ORCPT ); Mon, 28 Apr 2014 00:52:21 -0400 Received: from BLUPR03CA031.namprd03.prod.outlook.com (10.141.30.24) by BLUPR03MB424.namprd03.prod.outlook.com (10.141.78.152) with Microsoft SMTP Server (TLS) id 15.0.929.12; Mon, 28 Apr 2014 04:52:18 +0000 Received: from BL2FFO11FD049.protection.gbl (2a01:111:f400:7c09::132) by BLUPR03CA031.outlook.office365.com (2a01:111:e400:879::24) with Microsoft SMTP Server (TLS) id 15.0.934.12 via Frontend Transport; Mon, 28 Apr 2014 04:52:18 +0000 Received: from az84smr01.freescale.net (192.88.158.246) by BL2FFO11FD049.mail.protection.outlook.com (10.173.161.211) with Microsoft SMTP Server (TLS) id 15.0.929.8 via Frontend Transport; Mon, 28 Apr 2014 04:52:18 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s3S4pr3Z009014; Sun, 27 Apr 2014 21:52:14 -0700 From: Huang Shijie To: CC: , , , , , , , Huang Shijie Subject: [PATCH v2 05/10] Documentation: fsl-quadspi: update the document Date: Mon, 28 Apr 2014 11:53:42 +0800 Message-ID: <1398657227-20721-6-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.2.rc3 In-Reply-To: <1398657227-20721-1-git-send-email-b32955@freescale.com> References: <1398657227-20721-1-git-send-email-b32955@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.246; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(428001)(199002)(189002)(50226001)(81342001)(20776003)(85852003)(93916002)(76482001)(99396002)(81542001)(33646001)(48376002)(47776003)(77982001)(79102001)(89996001)(77156001)(36756003)(83072002)(31966008)(74662001)(46102001)(50466002)(74502001)(80022001)(87936001)(4396001)(62966002)(87286001)(80976001)(19580405001)(92566001)(88136002)(6806004)(44976005)(19580395003)(92726001)(83322001)(77096999)(76176999)(42262001); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR03MB424; H:az84smr01.freescale.net; FPR:FCF1F45C.859605D3.7BE474F2.80D9DEB1.20229; MLV:sfv; PTR:gate-az5.freescale.com; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 01952C6E96 Received-SPF: None (: freescale.com does not designate permitted sender hosts) X-OriginatorOrg: freescale.com Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The patch updates the document by adding more information to describe the DT proporties used by the Freescale Quadspi driver and the childs nodes. For the child node for SPI NOR flash, we add the required property ("spi-max-frequency"), and refer to spi-nor-flash.txt for the optional properties. Signed-off-by: Huang Shijie --- .../devicetree/bindings/mtd/fsl-quadspi.txt | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt index 823d134..7e1dbaf 100644 --- a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt @@ -1,5 +1,11 @@ * Freescale Quad Serial Peripheral Interface(QuadSPI) +The QuadSPI controller acts as the SPI master. It is described with a node +for the controller and a set of child nodes for each SPI NOR flash. + +Part I - The DT node for the controller: +------------------------------ + Required properties: - compatible : Should be "fsl,vf610-qspi" - reg : the first contains the register location and length, @@ -18,6 +24,16 @@ Optional properties: bus, you should enable this property. (Please check the board's schematic.) +Part II - The DT nodes for each SPI NOR flash +------------------------------ +Required properties: +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at + +Optional properties: + Please refer to the Documentation/devicetree/bindings/mtd/spi-nor-flash.txt + If you set the "spi-nor,ddr-quad-read-dummy", it means you enable the DDR + quad read feature for the driver. + Example: qspi0: quadspi@40044000 {