From patchwork Thu Mar 13 19:39:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 330086 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B5E4E2C00C6 for ; Fri, 14 Mar 2014 06:39:44 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755237AbaCMTjn (ORCPT ); Thu, 13 Mar 2014 15:39:43 -0400 Received: from mail-yh0-f51.google.com ([209.85.213.51]:52175 "EHLO mail-yh0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754804AbaCMTjn (ORCPT ); Thu, 13 Mar 2014 15:39:43 -0400 Received: by mail-yh0-f51.google.com with SMTP id f10so1552521yha.24 for ; Thu, 13 Mar 2014 12:39:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Kvfq4WocwaTqfuZgv7ykznpcGrkqURLt06kG7/t2VH8=; b=CASsOLuDxOelYKK3zBRKfd2YZJhwhlptSfuuBIORSYxWJBRVp3RDLeTmXx8iUn94W4 4nsx26r66GZVme7HoUyoaCAR95BNSD1DhYeMkQbNJ0qq19VwiiMp+8bs/ZdtCqvvj4cr QauuXveH118t/BDo0Dj8wJrmfGL7p0X/A7ogfam75k96kQtOQH7WWmokjreyDe5NLWK1 jV/7MrHCDPIg5xGVzNbR7b+9QhlQeOtGj6fIyO+MWlm/HAgLKBSJPhF6XVECJXzgJjBZ qX5NSBnkU4/XQ+8gCd+ANKcJ+t3zi4bXYw1nCr4fRe0+wkaNpqhTZqWJAzJDDCuIuUp5 Xn6w== X-Gm-Message-State: ALoCoQlG42mq9zPasPFn6TPNy4Gkz2YrquNSRqrOQFn1YseAfpbTmUQCUnG5y3PzEGb2lcDQm9xd X-Received: by 10.236.111.82 with SMTP id v58mr4862024yhg.108.1394739582456; Thu, 13 Mar 2014 12:39:42 -0700 (PDT) Received: from localhost.localdomain ([190.2.108.104]) by mx.google.com with ESMTPSA id t58sm8806635yho.20.2014.03.13.12.39.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Mar 2014 12:39:42 -0700 (PDT) From: Ezequiel Garcia To: Mike Turquette , Jason Cooper , , , Cc: Lior Amsalem , Tawfik Bayouk , Seif Mazareeb , Thomas Petazzoni , Gregory Clement , Andrew Lunn , Sebastian Hesselbarth , sergei.shtylyov@cogentembedded.com, Ezequiel Garcia Subject: [PATCH v2 6/6] clk: mvebu: Update binding documentation for the core divider clock Date: Thu, 13 Mar 2014 16:39:02 -0300 Message-Id: <1394739542-30017-7-git-send-email-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394739542-30017-1-git-send-email-ezequiel@vanguardiasur.com.ar> References: <1394739542-30017-1-git-send-email-ezequiel@vanguardiasur.com.ar> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Ezequiel Garcia The Core Divider clock support two new compatible strings for Armada 375 and Armada 380 SoCs. Add the compatible strings to the documentation. Signed-off-by: Ezequiel Garcia --- Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt index c62391f..520562a 100644 --- a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt +++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt @@ -4,7 +4,10 @@ The following is a list of provided IDs and clock names on Armada 370/XP: 0 = nand (NAND clock) Required properties: -- compatible : must be "marvell,armada-370-corediv-clock" +- compatible : must be "marvell,armada-370-corediv-clock", + "marvell,armada-375-corediv-clock", + "marvell,armada-380-corediv-clock", + - reg : must be the register address of Core Divider control register - #clock-cells : from common clock binding; shall be set to 1 - clocks : must be set to the parent's phandle