From patchwork Fri Feb 28 23:28:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Hogan X-Patchwork-Id: 325362 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1CF052C00BC for ; Sat, 1 Mar 2014 10:29:54 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752424AbaB1X3w (ORCPT ); Fri, 28 Feb 2014 18:29:52 -0500 Received: from mail-wg0-f42.google.com ([74.125.82.42]:58081 "EHLO mail-wg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752345AbaB1X3q (ORCPT ); Fri, 28 Feb 2014 18:29:46 -0500 Received: by mail-wg0-f42.google.com with SMTP id y10so1103132wgg.13 for ; Fri, 28 Feb 2014 15:29:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=fcIGUFBt45hUSrG8GX2c/UoKtaL8t5Frdrroc/Tu5D4=; b=QqepP8dhJ2MFVhgmA4weNQNeb113fpA3Lj3m8XnKxXXXBbsG/cHs6cMzWSRtnvqEzR DrU08gGFiAjLwUcvyewLsMKI3WiXgaCRWz1bg6I+Mawyy2NcJc37yhP/eb/TmHwuww7F mjwptjcTtboC3AhEmqaXkhJpkpmuDfsb7A1+OOYpy0SW3bne04BpFpMU9zoU0iQH4PFg +l6W9yxaYUiB/IAjPCoVZ/q5Qv3/S4my/RfWPxwtuAkK1MY/7cZbUqKet5a3gcFjcQMa xEmiScrVTwXpwfbUE8EfewKmkARlbcOdh+6JCX0lbwSdss835liOJ6W4VkyhNtJhaMzs qJdQ== X-Gm-Message-State: ALoCoQk5n+dgTFF/hvnBT+Y6alKFxlD08cLbpag3FRVRChgoylubLlBLoJ4ofG2qq1TpdI5y1kgI X-Received: by 10.180.11.233 with SMTP id t9mr10524646wib.1.1393630184686; Fri, 28 Feb 2014 15:29:44 -0800 (PST) Received: from radagast.lan (jahogan.plus.com. [212.159.75.221]) by mx.google.com with ESMTPSA id lz3sm9172173wic.1.2014.02.28.15.29.43 for (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128/128); Fri, 28 Feb 2014 15:29:44 -0800 (PST) From: James Hogan To: Mauro Carvalho Chehab , linux-media@vger.kernel.org Cc: James Hogan , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, Rob Landley , linux-doc@vger.kernel.org, Tomasz Figa Subject: [PATCH v4 01/10] dt: binding: add binding for ImgTec IR block Date: Fri, 28 Feb 2014 23:28:51 +0000 Message-Id: <1393630140-31765-2-git-send-email-james.hogan@imgtec.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1393630140-31765-1-git-send-email-james.hogan@imgtec.com> References: <1393630140-31765-1-git-send-email-james.hogan@imgtec.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding for ImgTec Consumer Infrared block, specifically major revision 1 of the hardware. Signed-off-by: James Hogan Acked-by: Rob Herring Cc: Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: devicetree@vger.kernel.org Cc: Rob Landley Cc: linux-doc@vger.kernel.org Cc: Tomasz Figa --- v3: - Rename compatible string to "img,ir-rev1" (Rob Herring). - Specify ordering of clocks explicitly (Rob Herring). v2: - Future proof compatible string from "img,ir" to "img,ir1", where the 1 corresponds to the major revision number of the hardware (Tomasz Figa). - Added clock-names property and three specific clock names described in the manual, only one of which is used by the current driver (Tomasz Figa). --- .../devicetree/bindings/media/img-ir-rev1.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/img-ir-rev1.txt diff --git a/Documentation/devicetree/bindings/media/img-ir-rev1.txt b/Documentation/devicetree/bindings/media/img-ir-rev1.txt new file mode 100644 index 0000000..5434ce6 --- /dev/null +++ b/Documentation/devicetree/bindings/media/img-ir-rev1.txt @@ -0,0 +1,34 @@ +* ImgTec Infrared (IR) decoder version 1 + +This binding is for Imagination Technologies' Infrared decoder block, +specifically major revision 1. + +Required properties: +- compatible: Should be "img,ir-rev1" +- reg: Physical base address of the controller and length of + memory mapped region. +- interrupts: The interrupt specifier to the cpu. + +Optional properties: +- clocks: List of clock specifiers as described in standard + clock bindings. + Up to 3 clocks may be specified in the following order: + 1st: Core clock (defaults to 32.768KHz if omitted). + 2nd: System side (fast) clock. + 3rd: Power modulation clock. +- clock-names: List of clock names corresponding to the clocks + specified in the clocks property. + Accepted clock names are: + "core": Core clock. + "sys": System clock. + "mod": Power modulation clock. + +Example: + + ir@02006200 { + compatible = "img,ir-rev1"; + reg = <0x02006200 0x100>; + interrupts = <29 4>; + clocks = <&clk_32khz>; + clock-names = "core"; + };