From patchwork Mon Feb 24 10:37:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 323573 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C48982C00C9 for ; Mon, 24 Feb 2014 22:22:35 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752437AbaBXLWf (ORCPT ); Mon, 24 Feb 2014 06:22:35 -0500 Received: from va3ehsobe005.messaging.microsoft.com ([216.32.180.31]:42777 "EHLO va3outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752414AbaBXLWe (ORCPT ); Mon, 24 Feb 2014 06:22:34 -0500 Received: from mail53-va3-R.bigfish.com (10.7.14.249) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 14.1.225.22; Mon, 24 Feb 2014 11:22:33 +0000 Received: from mail53-va3 (localhost [127.0.0.1]) by mail53-va3-R.bigfish.com (Postfix) with ESMTP id A9F993401D6; Mon, 24 Feb 2014 11:22:33 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6h1082kzz1de098h8275bh1de097hz2dh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h24afh2327h2336h2438h2461h2487h24d7h2516h2545h255eh1155h) Received: from mail53-va3 (localhost.localdomain [127.0.0.1]) by mail53-va3 (MessageSwitch) id 1393240951228421_26599; Mon, 24 Feb 2014 11:22:31 +0000 (UTC) Received: from VA3EHSMHS004.bigfish.com (unknown [10.7.14.227]) by mail53-va3.bigfish.com (Postfix) with ESMTP id 25CD1180047; Mon, 24 Feb 2014 11:22:31 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS004.bigfish.com (10.7.99.14) with Microsoft SMTP Server (TLS) id 14.16.227.3; Mon, 24 Feb 2014 11:22:30 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.3.158.2; Mon, 24 Feb 2014 11:22:29 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s1OBLp2L016423; Mon, 24 Feb 2014 04:22:25 -0700 From: Huang Shijie To: CC: , , , , , , , , , , , , , , Huang Shijie Subject: [PATCH v5 7/8] Documentation: add the binding file for Freescale QuadSPI driver Date: Mon, 24 Feb 2014 18:37:41 +0800 Message-ID: <1393238262-8622-8-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.2.rc3 In-Reply-To: <1393238262-8622-1-git-send-email-b32955@freescale.com> References: <1393238262-8622-1-git-send-email-b32955@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the binding file for Freescale QuadSPI driver. Signed-off-by: Huang Shijie --- .../devicetree/bindings/mtd/fsl-quadspi.txt | 35 ++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/fsl-quadspi.txt diff --git a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt new file mode 100644 index 0000000..823d134 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt @@ -0,0 +1,35 @@ +* Freescale Quad Serial Peripheral Interface(QuadSPI) + +Required properties: + - compatible : Should be "fsl,vf610-qspi" + - reg : the first contains the register location and length, + the second contains the memory mapping address and length + - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory" + - interrupts : Should contain the interrupt for the device + - clocks : The clocks needed by the QuadSPI controller + - clock-names : the name of the clocks + +Optional properties: + - fsl,qspi-has-second-chip: The controller has two buses, bus A and bus B. + Each bus can be connected with two NOR flashes. + Most of the time, each bus only has one NOR flash + connected, this is the default case. + But if there are two NOR flashes connected to the + bus, you should enable this property. + (Please check the board's schematic.) + +Example: + +qspi0: quadspi@40044000 { + compatible = "fsl,vf610-qspi"; + reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks VF610_CLK_QSPI0_EN>, + <&clks VF610_CLK_QSPI0>; + clock-names = "qspi_en", "qspi"; + + flash0: s25fl128s@0 { + .... + }; +};