From patchwork Thu Jan 30 13:46:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 315348 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DFCB72C00CD for ; Fri, 31 Jan 2014 00:46:09 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752916AbaA3NqJ (ORCPT ); Thu, 30 Jan 2014 08:46:09 -0500 Received: from mail-ea0-f195.google.com ([209.85.215.195]:57173 "EHLO mail-ea0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752846AbaA3NqI (ORCPT ); Thu, 30 Jan 2014 08:46:08 -0500 X-Greylist: delayed 83483 seconds by postgrey-1.27 at vger.kernel.org; Thu, 30 Jan 2014 08:46:07 EST Received: by mail-ea0-f195.google.com with SMTP id h14so687831eaj.2 for ; Thu, 30 Jan 2014 05:46:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=ajTD9yMHtEBOKgZA7RlvCEdIFHvku82UHfhLZJKEj20=; b=lEPc1i1k0kJYwR7Gz8thGm/blj0F2c0TSqfWbZ5Ec0umf2BDXo571CMoenCVAFauwl Q65YeP4/0kxn+O/X7Mfmo9cbOqXnaR/fXhuDmH7oRQLmq2XfJXgtWoINQ8yM2O6r1Wss MyILZbwRItLcsMMEVV4og7tKky2V72SOXwwOgiv7pJVKwTI5HrIKraULhovOgum0x8By FW7rwYwlsMGY/xELrdIEEPaqw1Y8wS4tAWuXUF1E0bn19qh69TU0kZBdNel4C7H+nQpB vlgl0YOprL5npILoN1Gwfi3cuJdH9zNW62z63pmcZ938QKD+EDf07xXg4OGCDtx0WCHA tLvA== X-Received: by 10.14.93.199 with SMTP id l47mr10881343eef.58.1391089566079; Thu, 30 Jan 2014 05:46:06 -0800 (PST) Received: from bbrezillon-laptop.int.overkiz.com ([80.245.18.66]) by mx.google.com with ESMTPSA id n7sm22570917eef.5.2014.01.30.05.46.04 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 Jan 2014 05:46:05 -0800 (PST) From: Boris BREZILLON To: Maxime Ripard , Rob Landley , Russell King , David Woodhouse , Grant Likely , Brian Norris , Jason Gunthorpe , Arnd Bergmann Cc: Boris BREZILLON , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mtd@lists.infradead.org, dev@linux-sunxi.org Subject: =?UTF-8?q?=5BRFC=20PATCH=20pre-v3=2007/14=5D=20of=3A=20mtd=3A=20add=20documentation=20for=20the=20ONFI=20NAND=20timing=20mode=20property?= Date: Thu, 30 Jan 2014 14:46:02 +0100 Message-Id: <1391089562-8385-1-git-send-email-b.brezillon.dev@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1391006064-28890-1-git-send-email-b.brezillon.dev@gmail.com> References: <1391006064-28890-1-git-send-email-b.brezillon.dev@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for the ONFI NAND timing mode property. Signed-off-by: Boris BREZILLON --- Changes since v2: - fix description of the nand-timing-mode property: the mode property is a mask containing all supported modes, each mode is encoded as a bit position Documentation/devicetree/bindings/mtd/nand.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt index 0c962296..60c7112 100644 --- a/Documentation/devicetree/bindings/mtd/nand.txt +++ b/Documentation/devicetree/bindings/mtd/nand.txt @@ -8,3 +8,10 @@ E.g. : nand-ecc-level = <4 512>; /* 4 bits / 512 bytes */ - nand-bus-width : 8 or 16 bus width if not present 8 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false +- onfi,nand-timing-mode: an integer encoding the supported ONFI timing modes of + the NAND chip. Each supported mode is represented as a bit position (i.e. : + mode 0 and 1 => (1 << 0) | (1 << 1) = 0x3). + This is only used when the chip does not support the ONFI standard. + The last bit set represent the closest mode fulfilling the NAND chip timings. + For a full description of the different timing modes see this document: + www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf‎