From patchwork Thu Dec 26 17:25:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 305294 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 08B5D2C009C for ; Fri, 27 Dec 2013 04:26:52 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753535Ab3LZR0u (ORCPT ); Thu, 26 Dec 2013 12:26:50 -0500 Received: from vps0.lunn.ch ([178.209.37.122]:42347 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753153Ab3LZR0u (ORCPT ); Thu, 26 Dec 2013 12:26:50 -0500 Received: from lunn by vps0.lunn.ch with local (Exim 4.80) (envelope-from ) id 1VwEh4-0001lA-As; Thu, 26 Dec 2013 18:25:58 +0100 From: Andrew Lunn To: Jason Cooper , kishon@ti.com, tj@kernel.org Cc: devicetree@vger.kernel.org, linux-ide@vger.kernel.org, Gregory Clement , Sebastian Hesselbarth , Andrew Lunn Subject: [PATCH v4 1/4] Phy: DT binding documentation for Marvell MVEBU SATA phy. Date: Thu, 26 Dec 2013 18:25:39 +0100 Message-Id: <1388078742-6726-2-git-send-email-andrew@lunn.ch> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1388078742-6726-1-git-send-email-andrew@lunn.ch> References: <20131219194237.GC22725@htj.dyndns.org> <1388078742-6726-1-git-send-email-andrew@lunn.ch> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe the binding for the Marvell MVEBU SATA phy. This driver can be used at least with Kirkwood, Dove and maybe others. Additionally, update the SATA binding with the properties to link to the phy nodes. Signed-off-by: Andrew Lunn --- v1->v2: Correct #phy-cells Correct number after @ to match first reg address. Rename to phy-mvebu.txt v2->v3: Renamed to mvebu-phy.txt Use "port0", "port1" instead of "0", "1" --- Documentation/devicetree/bindings/ata/marvell.txt | 6 ++++++ .../devicetree/bindings/phy/mvebu-phy.txt | 22 ++++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mvebu-phy.txt diff --git a/Documentation/devicetree/bindings/ata/marvell.txt b/Documentation/devicetree/bindings/ata/marvell.txt index b5cdd20..4c5447f 100644 --- a/Documentation/devicetree/bindings/ata/marvell.txt +++ b/Documentation/devicetree/bindings/ata/marvell.txt @@ -6,11 +6,17 @@ Required Properties: - interrupts : Interrupt controller is using - nr-ports : Number of SATA ports in use. +Optional Properties: +- phys : List of phandles to sata phys +- phy-names : Should be "port0", "port1", etc, one per phandle + Example: sata@80000 { compatible = "marvell,orion-sata"; reg = <0x80000 0x5000>; interrupts = <21>; + phys = <&sata_phy0>, <&sata_phy1>; + phy-names = "port0", "port1"; nr-ports = <2>; } diff --git a/Documentation/devicetree/bindings/phy/mvebu-phy.txt b/Documentation/devicetree/bindings/phy/mvebu-phy.txt new file mode 100644 index 0000000..6cb3364 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mvebu-phy.txt @@ -0,0 +1,22 @@ +* Marvell MVEBU SATA PHY + +Power control for the SATA phy found on Marvell MVEBU SoCs. + +This document extends the binding described in phy-bindings.txt + +Required properties : + + - reg : Offset and length of the register set for the SATA device + - compatible : Should be "marvell,mvebu-sata-phy" + - clocks : phandle of clock and specifier that supplies the device + - clock-names : Should be "sata" + +Example: + sata-phy@84000 { + compatible = "marvell,mvebu-sata-phy"; + reg = <0x84000 0x0334>; + clocks = <&gate_clk 15>; + clock-names = "sata"; + #phy-cells = <0>; + status = "ok"; + };