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[v1,0/2] riscv: dts: add USB nodes for Canaan Kendryte K230 SoCs

Message ID tencent_E9B853316D217B8D1E7CDF8288DA5E8ED908@qq.com
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Series riscv: dts: add USB nodes for Canaan Kendryte K230 SoCs | expand

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Yangyu Chen April 21, 2024, 12:52 p.m. UTC 
As K230 SoCs have two USB controllers, add USB nodes for it. I have tested
the new dts file on both CanMV-K230 and K230 EVB. 

I confirm it can work well in USB Host Mode with high speed. I use
CanMV-K230 to connect an RTL8152 USB Ethernet adaptor to an OTG Port
(USB0), which works well with this log [1]. The on-board ethernet is
connected to the USB1 port, which works. On K230 EVB, the RTL8152 USB
Ethernet adaptor works well on a USB0 port with high speed [2]. I have no
health device to test the USB1 port on K230 EVB. My K230 EVB USB1 port has
no +5V power output even on factory-patched u-boot + opensbi+ kernel. 

I also confirmed the dt-binding can work well with NFS as rootfs over USB
Ethernet. It's good news for those who want to use K230 SoCs to boot a
mainline kernel with distro rootfs for daily RVV1.0 software performance
evaluation since we haven't submitted MMC drivers to the mainline for
SD Card support.

There is a thing to do: add the USB PHY drivers. Although I can let
High-Speed USB work on both of my boards, the pulling on D+ and D- pins are
not right in gadget mode for another host to detect the speed. We can see
from the factory-patched USB driver, which adds an item pointer to the USB
PHY controller [3] and sets the pulling mode for D+ and D- pins for
different modes [4]. However, the factory-patched USB driver is not the
right way for the mainline kernel to go. We should add the USB PHY drivers
to do the right thing. We can infer these things from the factory code:

- USB PHY Control MMIOs are at base 0x91585000 with size 0x1000. [3]
- usb_ctl3 register controls the ID_PULLUP, DMPULLDOWN(D-), DPPULLDOWN(D+).
- ID_PULLUP is at bit 4, DMPULLDOWN is at bit 8, DPPULLDOWN is at bit 9.
- The usb_ctl3 register is 4Bytes wide.
- For USB0 port, usb_ctl3 is at offset 0x7c.
- For USB1 port, usb_ctl3 is at offset 0x9c. [4]

But I'm too busy these days to add a PHY driver. I would be happy to help
if someone volunteered to do that.

base-branch: [5]

This patch is available to test on that tree [6].

[1] https://gist.github.com/cyyself/f7f2849e6a262b6281687b906e1512cc
[2] https://gist.github.com/cyyself/ea8895012d1035ca5bd3375b798f5786
[3] https://github.com/kendryte/k230_sdk/blob/v1.5/src/little/linux/drivers/usb/dwc2/platform.c#L526
[4] https://github.com/kendryte/k230_sdk/blob/v1.5/src/little/linux/drivers/usb/dwc2/params.c#L195
[5] https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-dt-for-next
[6] https://github.com/cyyself/linux/tree/k230-usb-v1

Yangyu Chen (2):
  dt-bindings: dwc2: Add bindings for new Canaan Kendryte K230 SoC
  riscv: dts: add usb nodes for Canaan Kendryte K230 SoCs

 .../devicetree/bindings/usb/dwc2.yaml         |  3 ++
 arch/riscv/boot/dts/canaan/k230.dtsi          | 29 +++++++++++++++++++
 2 files changed, 32 insertions(+)

base-commit: 5db2c4dc413e27720b8f567522cd5ebb0bb7ef70