From patchwork Thu Dec 12 02:48:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 1208103 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=synopsys.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.b="L5q47asl"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47YJCh6yb8z9sPc for ; Thu, 12 Dec 2019 13:49:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727845AbfLLCtE (ORCPT ); Wed, 11 Dec 2019 21:49:04 -0500 Received: from us03-smtprelay2.synopsys.com ([149.117.87.133]:38118 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727599AbfLLCtD (ORCPT ); Wed, 11 Dec 2019 21:49:03 -0500 Received: from mailhost.synopsys.com (sv2-mailhost1.synopsys.com [10.205.2.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 77709C0084; Thu, 12 Dec 2019 02:49:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1576118942; bh=ta14JiyZFbEKwsXrq3lRZW1hLWDxxcBeGnI5Eswl/WM=; h=Date:From:Subject:To:Cc:From; b=L5q47asllvi0qp+gHokHfXfQagOmAk2EHA6PA2IHcBt0cC3qdTlFMUeERfBz4gS+5 +qOZfUuv2kcT1D5YFYHXRnPB7diXW0dpt4kAZuBCi75Q7BcYgTbrLj7cStOC3VlmLV JUcDCOV/nPtjGuqJkOUcBUGDJOohigmdkcHRfEjepG4EgB81tKn8Ln1pyriqUh9yL8 cnwas9n/iZ3FcJbCQU8LRynbGypgT7FVwjaVK9eYl6Xec+Yd2H9LPcxthXp3j7gSvC XxpHInvIFcfg+J8NqQdmvx6OMN9rZj9Kojj28vwi8pAKkc3MHuNzmBtxAbzQgmo3lJ c25MVl2PkVbTg== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id F2FBCA007C; Thu, 12 Dec 2019 02:48:58 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Wed, 11 Dec 2019 18:48:58 -0800 Date: Wed, 11 Dec 2019 18:48:58 -0800 Message-Id: From: Thinh Nguyen Subject: [RFC PATCH 00/14] usb: dwc3: Introduce DWC_usb32 To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Alan Stern , Mark Rutland , Roger Quadros , zhengbin Cc: John Youn Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch series adds support to Synopsys DWC_usb32 controller which is capable of dual-lane and USB speed up to 40 Gbps. In order to support this new controller, we need to make a few updates the USB stack and dwc3 driver: 1) dwc3 driver needs to update its IP and revision check. The current scheme does not support more than 2 controllers. 2) Introduce Lane Speed Mantissa and lane count on the gadget side. Devices operating in SuperSpeed Plus can refer to gen2x1, gen1x2, or gen2x2. 3) Add a new gadget opts to set the sublink speed for drivers that are constrained to certain lane count or lane speed mantissa. 4) Add miscellaneous initialization checks for DWC_usb32. Any review comment is highly appreciated. Thank you, Thinh This patch series depends on the following patches usb: dwc3: Fix GTXFIFOSIZ.TXFDEP macro name usb: dwc3: gadget: Properly set maxpacket limit https://patchwork.kernel.org/cover/11283761/ Thinh Nguyen (14): usb: gadget: Add lane count and lsm usb: gadget: Add callback to set lane and transfer rate usb: composite: Properly report lsm usb: dwc3: Implement new id check for DWC_usb32 usb: dwc3: Update IP checks to support DWC_usb32 usb: devicetree: dwc3: Add max lane and lsm usb: dwc3: gadget: Set lane count and lsm usb: dwc3: gadget: Track connected lane count and speed usb: dwc3: gadget: Limit the setting of speed usb: dwc3: Update HWPARAMS0.MDWIDTH for DWC_usb32 usb: devicetree: dwc3: Add TRB prefetch count usb: dwc3: gadget: Set number of TRB prefetch usb: devicetree: dwc3: Add property to disable mult TRB fetch usb: dwc3: gadget: Implement disabling of mult TRB fetch Documentation/devicetree/bindings/usb/dwc3.txt | 9 ++ drivers/usb/dwc3/core.c | 88 ++++++++---- drivers/usb/dwc3/core.h | 65 ++++++--- drivers/usb/dwc3/debugfs.c | 14 +- drivers/usb/dwc3/gadget.c | 181 +++++++++++++++++++------ drivers/usb/dwc3/host.c | 2 +- drivers/usb/gadget/composite.c | 16 ++- drivers/usb/gadget/legacy/mass_storage.c | 2 + drivers/usb/gadget/udc/core.c | 38 +++++- include/linux/usb/composite.h | 4 + include/linux/usb/gadget.h | 15 ++ 11 files changed, 344 insertions(+), 90 deletions(-)