From patchwork Fri Mar 16 22:33:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 887188 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=synopsys.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4030cB2RKBz9sBy for ; Sat, 17 Mar 2018 09:33:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751499AbeCPWdo (ORCPT ); Fri, 16 Mar 2018 18:33:44 -0400 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:37231 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750915AbeCPWdo (ORCPT ); Fri, 16 Mar 2018 18:33:44 -0400 Received: from mailhost.synopsys.com (mailhost3.synopsys.com [10.12.238.238]) by smtprelay.synopsys.com (Postfix) with ESMTP id 9D10E24E0D3E; Fri, 16 Mar 2018 15:33:43 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 648FB3442; Fri, 16 Mar 2018 15:33:43 -0700 (PDT) Received: from US01WEHTC2.internal.synopsys.com (us01wehtc2-vip.internal.synopsys.com [10.12.239.238]) by mailhost.synopsys.com (Postfix) with ESMTP id 5111A3440; Fri, 16 Mar 2018 15:33:43 -0700 (PDT) Received: from US01WEHTC1.internal.synopsys.com (10.12.239.236) by US01WEHTC2.internal.synopsys.com (10.12.239.237) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 16 Mar 2018 15:33:43 -0700 Received: from te-lab16 (10.13.184.20) by us01wehtc1.internal.synopsys.com (10.12.239.236) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 16 Mar 2018 15:33:41 -0700 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 16 Mar 2018 15:33:41 -0700 Date: Fri, 16 Mar 2018 15:33:41 -0700 Message-ID: From: Thinh Nguyen Subject: [PATCH v5 00/10] usb: dwc3: Add new updates for DWC_usb31 To: Felipe Balbi , Thinh Nguyen , , , Rob Herring , Mark Rutland CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch series adds new updates and some fixes for DWC_usb31. Changes in v5: - Remove isoc workaround patches from series - Remove "usb: core: urb: Check SSP isoc ep comp descriptor" from series Changes in v4: - Correctly refer "databook" as "programming guide" - Document more detail about enabling of ESS periodic tx/rx threshold Changes in v3: - Add "usb: dwc3: Check controller type before setting speed" to series Changes in v2: - Add another patch to the series to increase mass_storage max_speed - Separate "usb: dwc3: ep0: Reset TRB counter for ep0 IN" from series - Separate "usb: dwc3: gadget: Set maxpacket size for ep0 IN" from series - Use msleep() instead of mdelay() for SoftReset PHY sync delay - Rename new USB31 macros from DWC3_USB31_* to DWC31_* - Rename device properties and replace '_' with '-' - Minor fixes in the commit messages Thinh Nguyen (10): usb: dwc3: Add SoftReset PHY synchonization delay usb: dwc3: Update DWC_usb31 GTXFIFOSIZ reg fields usb: dwc3: Check IP revision for GTXFIFOSIZ usb: dwc3: Add DWC_usb31 GRXTHRCFG bit fields usb: dwc3: gadget: Check IP revision for GRXTHRCFG usb: dwc3: Add DWC_usb31 GTXTHRCFG reg fields usb: dwc3: Make TX/RX threshold configurable usb: dwc3: Check for ESS TX/RX threshold config usb: dwc3: Dump LSP and BMU debug info usb: dwc3: Check controller type before setting speed Documentation/devicetree/bindings/usb/dwc3.txt | 16 ++++++ drivers/usb/dwc3/core.c | 68 +++++++++++++++++++++++++- drivers/usb/dwc3/core.h | 35 +++++++++++++ drivers/usb/dwc3/debugfs.c | 5 ++ drivers/usb/dwc3/gadget.c | 16 ++++-- 5 files changed, 136 insertions(+), 4 deletions(-)