| Message ID | 20240913103755.7290-1-quic_mukhopad@quicinc.com |
|---|---|
| Headers | show |
| Series | Add support for DisplayPort on SA8775P platform | expand |
On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> wrote: > > In order to support different HW versions, introduce aux_cfg array > to move v4 specific aux configuration settings. > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > v2: Fixed review comments from Bjorn and Dmitry > - Made aux_cfg array as const. > > --- > drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- > 1 file changed, 23 insertions(+), 14 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c > index da2b32fb5b45..bcd5aced9e06 100644 > --- a/drivers/phy/qualcomm/phy-qcom-edp.c > +++ b/drivers/phy/qualcomm/phy-qcom-edp.c > @@ -90,6 +90,7 @@ struct phy_ver_ops { > > struct qcom_edp_phy_cfg { > bool is_edp; > + const u8 *aux_cfg; > const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; > const struct phy_ver_ops *ver_ops; > }; > @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { > .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, > }; > > +static const u8 edp_phy_aux_cfg_v4[10] = { > + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 > +}; > + > static int qcom_edp_phy_init(struct phy *phy) > { > struct qcom_edp *edp = phy_get_drvdata(phy); > + u8 aux_cfg[10]; Please define 10, so that there are no magic numbers (and less chance of damaging the stack if it gets changed in one place only. > int ret; > - u8 cfg8; > > ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); > if (ret) > @@ -200,6 +205,8 @@ static int qcom_edp_phy_init(struct phy *phy) > if (ret) > goto out_disable_supplies; > > + memcpy(aux_cfg, edp->cfg->aux_cfg, sizeof(aux_cfg)); > + > writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | > DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, > edp->edp + DP_PHY_PD_CTL); > @@ -222,22 +229,20 @@ static int qcom_edp_phy_init(struct phy *phy) > * even needed. > */ > if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) > - cfg8 = 0xb7; > - else > - cfg8 = 0x37; > + aux_cfg[8] = 0xb7; > > writel(0xfc, edp->edp + DP_PHY_MODE); > > - writel(0x00, edp->edp + DP_PHY_AUX_CFG0); > - writel(0x13, edp->edp + DP_PHY_AUX_CFG1); > - writel(0x24, edp->edp + DP_PHY_AUX_CFG2); > - writel(0x00, edp->edp + DP_PHY_AUX_CFG3); > - writel(0x0a, edp->edp + DP_PHY_AUX_CFG4); > - writel(0x26, edp->edp + DP_PHY_AUX_CFG5); > - writel(0x0a, edp->edp + DP_PHY_AUX_CFG6); > - writel(0x03, edp->edp + DP_PHY_AUX_CFG7); > - writel(cfg8, edp->edp + DP_PHY_AUX_CFG8); > - writel(0x03, edp->edp + DP_PHY_AUX_CFG9); > + writel(aux_cfg[0], edp->edp + DP_PHY_AUX_CFG0); > + writel(aux_cfg[1], edp->edp + DP_PHY_AUX_CFG1); > + writel(aux_cfg[2], edp->edp + DP_PHY_AUX_CFG2); > + writel(aux_cfg[3], edp->edp + DP_PHY_AUX_CFG3); > + writel(aux_cfg[4], edp->edp + DP_PHY_AUX_CFG4); > + writel(aux_cfg[5], edp->edp + DP_PHY_AUX_CFG5); > + writel(aux_cfg[6], edp->edp + DP_PHY_AUX_CFG6); > + writel(aux_cfg[7], edp->edp + DP_PHY_AUX_CFG7); > + writel(aux_cfg[8], edp->edp + DP_PHY_AUX_CFG8); > + writel(aux_cfg[9], edp->edp + DP_PHY_AUX_CFG9); Replace this with a loop? > > writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | > PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | > @@ -519,16 +524,19 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = { > }; > > static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = { > + .aux_cfg = edp_phy_aux_cfg_v4, > .ver_ops = &qcom_edp_phy_ops_v4, > }; > > static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = { > + .aux_cfg = edp_phy_aux_cfg_v4, > .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, > .ver_ops = &qcom_edp_phy_ops_v4, > }; > > static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = { > .is_edp = true, > + .aux_cfg = edp_phy_aux_cfg_v4, > .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg, > .ver_ops = &qcom_edp_phy_ops_v4, > }; > @@ -707,6 +715,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = { > }; > > static struct qcom_edp_phy_cfg x1e80100_phy_cfg = { > + .aux_cfg = edp_phy_aux_cfg_v4, > .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, > .ver_ops = &qcom_edp_phy_ops_v6, > }; > -- > 2.17.1 >
On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> wrote: > > The Qualcomm SA8775P platform comes with a DisplayPort controller > with a different base offset than the previous SoCs, > add support for this in the DisplayPort driver. > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > v2: No change > > --- > drivers/gpu/drm/msm/dp/dp_display.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index e1228fb093ee..e4954fd99eb0 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -118,6 +118,12 @@ struct msm_dp_desc { > bool wide_bus_supported; > }; > > +static const struct msm_dp_desc sa8775p_dp_descs[] = { > + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, Please wait for the discussion to end before posting new iterations. In this case Bjorn pointed out that this is not the full configuration. Please add a comment, describing that there is a second MDSS, which isn't declared here as it wasn't validated. > + {} > +}; > + > static const struct msm_dp_desc sc7180_dp_descs[] = { > { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, > {} > @@ -162,6 +168,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { > }; > > static const struct of_device_id dp_dt_match[] = { > + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, > { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, > { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, > { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, > -- > 2.17.1 >
On Fri, Sep 13, 2024 at 04:07:53PM GMT, Soutrik Mukhopadhyay wrote: > Add support for eDP PHY v5 found on the Qualcomm SA8775P platform. > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > v2: Fixed review comments from Dmitry > - Reused edp_swing_hbr_rbr and edp_swing_hbr2_hbr3 for v5. > > --- > drivers/phy/qualcomm/phy-qcom-edp.c | 33 +++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 13.09.2024 12:37 PM, Soutrik Mukhopadhyay wrote: > In order to support different HW versions, introduce aux_cfg array > to move v4 specific aux configuration settings. > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > v2: Fixed review comments from Bjorn and Dmitry > - Made aux_cfg array as const. > > --- > drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- > 1 file changed, 23 insertions(+), 14 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c > index da2b32fb5b45..bcd5aced9e06 100644 > --- a/drivers/phy/qualcomm/phy-qcom-edp.c > +++ b/drivers/phy/qualcomm/phy-qcom-edp.c > @@ -90,6 +90,7 @@ struct phy_ver_ops { > > struct qcom_edp_phy_cfg { > bool is_edp; > + const u8 *aux_cfg; > const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; > const struct phy_ver_ops *ver_ops; > }; > @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { > .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, > }; > > +static const u8 edp_phy_aux_cfg_v4[10] = { > + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 > +}; How about we only abstract the values that differ? It would seem like more platforms reuse about half of these magic bytes Konrad
On Sat, 14 Sept 2024 at 14:29, Konrad Dybcio <konradybcio@kernel.org> wrote: > > On 13.09.2024 12:37 PM, Soutrik Mukhopadhyay wrote: > > In order to support different HW versions, introduce aux_cfg array > > to move v4 specific aux configuration settings. > > > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > > --- > > v2: Fixed review comments from Bjorn and Dmitry > > - Made aux_cfg array as const. > > > > --- > > drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- > > 1 file changed, 23 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c > > index da2b32fb5b45..bcd5aced9e06 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-edp.c > > +++ b/drivers/phy/qualcomm/phy-qcom-edp.c > > @@ -90,6 +90,7 @@ struct phy_ver_ops { > > > > struct qcom_edp_phy_cfg { > > bool is_edp; > > + const u8 *aux_cfg; > > const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; > > const struct phy_ver_ops *ver_ops; > > }; > > @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { > > .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, > > }; > > > > +static const u8 edp_phy_aux_cfg_v4[10] = { > > + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 > > +}; > > How about we only abstract the values that differ? It would seem like more > platforms reuse about half of these magic bytes I think it's easier to review and compare the whole sequence rather than numbers here and then numbers there.
On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote: > On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay > <quic_mukhopad@quicinc.com> wrote: >> In order to support different HW versions, introduce aux_cfg array >> to move v4 specific aux configuration settings. >> >> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> >> --- >> v2: Fixed review comments from Bjorn and Dmitry >> - Made aux_cfg array as const. >> >> --- >> drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- >> 1 file changed, 23 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c >> index da2b32fb5b45..bcd5aced9e06 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c >> @@ -90,6 +90,7 @@ struct phy_ver_ops { >> >> struct qcom_edp_phy_cfg { >> bool is_edp; >> + const u8 *aux_cfg; >> const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; >> const struct phy_ver_ops *ver_ops; >> }; >> @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { >> .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, >> }; >> >> +static const u8 edp_phy_aux_cfg_v4[10] = { >> + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 >> +}; >> + >> static int qcom_edp_phy_init(struct phy *phy) >> { >> struct qcom_edp *edp = phy_get_drvdata(phy); >> + u8 aux_cfg[10]; > Please define 10, so that there are no magic numbers (and less chance > of damaging the stack if it gets changed in one place only. Sure, we will update this in the next version. > >> int ret; >> - u8 cfg8; >> >> ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); >> if (ret) >> @@ -200,6 +205,8 @@ static int qcom_edp_phy_init(struct phy *phy) >> if (ret) >> goto out_disable_supplies; >> >> + memcpy(aux_cfg, edp->cfg->aux_cfg, sizeof(aux_cfg)); >> + >> writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | >> DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, >> edp->edp + DP_PHY_PD_CTL); >> @@ -222,22 +229,20 @@ static int qcom_edp_phy_init(struct phy *phy) >> * even needed. >> */ >> if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) >> - cfg8 = 0xb7; >> - else >> - cfg8 = 0x37; >> + aux_cfg[8] = 0xb7; >> >> writel(0xfc, edp->edp + DP_PHY_MODE); >> >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG0); >> - writel(0x13, edp->edp + DP_PHY_AUX_CFG1); >> - writel(0x24, edp->edp + DP_PHY_AUX_CFG2); >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG3); >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG4); >> - writel(0x26, edp->edp + DP_PHY_AUX_CFG5); >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG6); >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG7); >> - writel(cfg8, edp->edp + DP_PHY_AUX_CFG8); >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG9); >> + writel(aux_cfg[0], edp->edp + DP_PHY_AUX_CFG0); >> + writel(aux_cfg[1], edp->edp + DP_PHY_AUX_CFG1); >> + writel(aux_cfg[2], edp->edp + DP_PHY_AUX_CFG2); >> + writel(aux_cfg[3], edp->edp + DP_PHY_AUX_CFG3); >> + writel(aux_cfg[4], edp->edp + DP_PHY_AUX_CFG4); >> + writel(aux_cfg[5], edp->edp + DP_PHY_AUX_CFG5); >> + writel(aux_cfg[6], edp->edp + DP_PHY_AUX_CFG6); >> + writel(aux_cfg[7], edp->edp + DP_PHY_AUX_CFG7); >> + writel(aux_cfg[8], edp->edp + DP_PHY_AUX_CFG8); >> + writel(aux_cfg[9], edp->edp + DP_PHY_AUX_CFG9); > Replace this with a loop? Can we use below approach for this : #define DP_PHY_AUX_CFG(n) (0x24 + (0x04 * (n))) for (int i = 0; i < 10; i++) writel(aux_cfg[i], edp->edp + DP_PHY_AUX_CFG(i)); > >> writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | >> PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | >> @@ -519,16 +524,19 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = { >> }; >> >> static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> >> static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> >> static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = { >> .is_edp = true, >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> @@ -707,6 +715,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = { >> }; >> >> static struct qcom_edp_phy_cfg x1e80100_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v6, >> }; >> -- >> 2.17.1 >> >
On Tue, 17 Sept 2024 at 10:40, Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> wrote: > > > On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote: > > On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay > > <quic_mukhopad@quicinc.com> wrote: > >> In order to support different HW versions, introduce aux_cfg array > >> to move v4 specific aux configuration settings. > >> > >> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > >> --- > >> v2: Fixed review comments from Bjorn and Dmitry > >> - Made aux_cfg array as const. > >> > >> --- > >> drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- > >> 1 file changed, 23 insertions(+), 14 deletions(-) > >> > >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c > >> index da2b32fb5b45..bcd5aced9e06 100644 > >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c > >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c > >> @@ -90,6 +90,7 @@ struct phy_ver_ops { > >> > >> struct qcom_edp_phy_cfg { > >> bool is_edp; > >> + const u8 *aux_cfg; > >> const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; > >> const struct phy_ver_ops *ver_ops; > >> }; > >> @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { > >> .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, > >> }; > >> > >> +static const u8 edp_phy_aux_cfg_v4[10] = { > >> + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 > >> +}; > >> + > >> static int qcom_edp_phy_init(struct phy *phy) > >> { > >> struct qcom_edp *edp = phy_get_drvdata(phy); > >> + u8 aux_cfg[10]; > > Please define 10, so that there are no magic numbers (and less chance > > of damaging the stack if it gets changed in one place only. > > > Sure, we will update this in the next version. > > > > > >> int ret; > >> - u8 cfg8; > >> > >> ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); > >> if (ret) > >> @@ -200,6 +205,8 @@ static int qcom_edp_phy_init(struct phy *phy) > >> if (ret) > >> goto out_disable_supplies; > >> > >> + memcpy(aux_cfg, edp->cfg->aux_cfg, sizeof(aux_cfg)); > >> + > >> writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | > >> DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, > >> edp->edp + DP_PHY_PD_CTL); > >> @@ -222,22 +229,20 @@ static int qcom_edp_phy_init(struct phy *phy) > >> * even needed. > >> */ > >> if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) > >> - cfg8 = 0xb7; > >> - else > >> - cfg8 = 0x37; > >> + aux_cfg[8] = 0xb7; > >> > >> writel(0xfc, edp->edp + DP_PHY_MODE); > >> > >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG0); > >> - writel(0x13, edp->edp + DP_PHY_AUX_CFG1); > >> - writel(0x24, edp->edp + DP_PHY_AUX_CFG2); > >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG3); > >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG4); > >> - writel(0x26, edp->edp + DP_PHY_AUX_CFG5); > >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG6); > >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG7); > >> - writel(cfg8, edp->edp + DP_PHY_AUX_CFG8); > >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG9); > >> + writel(aux_cfg[0], edp->edp + DP_PHY_AUX_CFG0); > >> + writel(aux_cfg[1], edp->edp + DP_PHY_AUX_CFG1); > >> + writel(aux_cfg[2], edp->edp + DP_PHY_AUX_CFG2); > >> + writel(aux_cfg[3], edp->edp + DP_PHY_AUX_CFG3); > >> + writel(aux_cfg[4], edp->edp + DP_PHY_AUX_CFG4); > >> + writel(aux_cfg[5], edp->edp + DP_PHY_AUX_CFG5); > >> + writel(aux_cfg[6], edp->edp + DP_PHY_AUX_CFG6); > >> + writel(aux_cfg[7], edp->edp + DP_PHY_AUX_CFG7); > >> + writel(aux_cfg[8], edp->edp + DP_PHY_AUX_CFG8); > >> + writel(aux_cfg[9], edp->edp + DP_PHY_AUX_CFG9); > > Replace this with a loop? > > > Can we use below approach for this : > > #define DP_PHY_AUX_CFG(n) (0x24 + (0x04 * (n))) > > for (int i = 0; i < 10; i++) > > writel(aux_cfg[i], edp->edp + DP_PHY_AUX_CFG(i)); That's what I meant, thank you! > > > > > >> writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | > >> PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | > >> @@ -519,16 +524,19 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = { > >> }; > >> > >> static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = { > >> + .aux_cfg = edp_phy_aux_cfg_v4, > >> .ver_ops = &qcom_edp_phy_ops_v4, > >> }; > >> > >> static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = { > >> + .aux_cfg = edp_phy_aux_cfg_v4, > >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, > >> .ver_ops = &qcom_edp_phy_ops_v4, > >> }; > >> > >> static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = { > >> .is_edp = true, > >> + .aux_cfg = edp_phy_aux_cfg_v4, > >> .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg, > >> .ver_ops = &qcom_edp_phy_ops_v4, > >> }; > >> @@ -707,6 +715,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = { > >> }; > >> > >> static struct qcom_edp_phy_cfg x1e80100_phy_cfg = { > >> + .aux_cfg = edp_phy_aux_cfg_v4, > >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, > >> .ver_ops = &qcom_edp_phy_ops_v6, > >> }; > >> -- > >> 2.17.1 > >> > >
This series adds support for the DisplayPort controller and eDP PHY v5 found on the Qualcomm SA8775P platform. --- v2: Fixed review comments from Dmitry and Bjorn - Made aux_cfg array as const. - Reused edp_swing_hbr_rbr and edp_swing_hbr2_hbr3 for v5. --- Soutrik Mukhopadhyay (5): dt-bindings: phy: Add eDP PHY compatible for sa8775p phy: qcom: edp: Introduce aux_cfg array for version specific aux settings phy: qcom: edp: Add support for eDP PHY on SA8775P dt-bindings: display: msm: dp-controller: document SA8775P compatible drm/msm/dp: Add DisplayPort controller for SA8775P .../bindings/display/msm/dp-controller.yaml | 1 + .../devicetree/bindings/phy/qcom,edp-phy.yaml | 1 + drivers/gpu/drm/msm/dp/dp_display.c | 7 ++ drivers/phy/qualcomm/phy-qcom-edp.c | 70 +++++++++++++++---- 4 files changed, 65 insertions(+), 14 deletions(-)