| Message ID | 20240725-gcc-sc8180x-fixes-v1-0-576a55fe4780@quicinc.com |
|---|---|
| Headers | show |
| Series | clk: qcom: gcc-sc8180x: Add DFS support and few fixes | expand |
On Thu, Jul 25, 2024 at 05:03:13PM GMT, Satya Priya Kakitapalli wrote: > Add the missing GPLL9 pll and fix the gcc_parents_7 data to use > the correct pll hw. > > Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > --- > drivers/clk/qcom/gcc-sc8180x.c | 20 +++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On Thu, Jul 25, 2024 at 05:03:14PM GMT, Satya Priya Kakitapalli wrote: > Update the frequency tables of gcc_sdcc2_apps_clk and gcc_sdcc4_apps_clk > as per the latest frequency plan. > > Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Fixes should come first in the series. Also consider following stable kernel process. If possible, describe the reason for the changes. > --- > drivers/clk/qcom/gcc-sc8180x.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sc8180x.c b/drivers/clk/qcom/gcc-sc8180x.c > index f9f3e1254ce1..e85e75792ac3 100644 > --- a/drivers/clk/qcom/gcc-sc8180x.c > +++ b/drivers/clk/qcom/gcc-sc8180x.c > @@ -974,7 +974,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { > F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2), > F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), > F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), > - F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0), > + F(202000000, P_GPLL9_OUT_MAIN, 4, 0, 0), > { } > }; > > @@ -997,9 +997,8 @@ static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = { > F(400000, P_BI_TCXO, 12, 1, 4), > F(9600000, P_BI_TCXO, 2, 0, 0), > F(19200000, P_BI_TCXO, 1, 0, 0), > - F(37500000, P_GPLL0_OUT_MAIN, 16, 0, 0), > F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), > - F(75000000, P_GPLL0_OUT_MAIN, 8, 0, 0), > + F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), > { } > }; > > > -- > 2.25.1 >
On Thu, Jul 25, 2024 at 05:03:11PM GMT, Satya Priya Kakitapalli wrote: > QUPv3 clocks support DFS, thus register the RCGs which require > support for DFS. From the commit message it is not clear if the patch fixes the issue (and thus should have Fixes and possibly cc:stable) or an improvement. > > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > --- > drivers/clk/qcom/gcc-sc8180x.c | 350 ++++++++++++++++++++++++----------------- > 1 file changed, 210 insertions(+), 140 deletions(-) >
On 7/27/2024 4:24 PM, Dmitry Baryshkov wrote: > On Thu, Jul 25, 2024 at 05:03:11PM GMT, Satya Priya Kakitapalli wrote: >> QUPv3 clocks support DFS, thus register the RCGs which require >> support for DFS. > From the commit message it is not clear if the patch fixes the issue > (and thus should have Fixes and possibly cc:stable) or an improvement. Actually its a fix, I'll add Fixes tag in next post. >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> >> --- >> drivers/clk/qcom/gcc-sc8180x.c | 350 ++++++++++++++++++++++++----------------- >> 1 file changed, 210 insertions(+), 140 deletions(-) >> >
On Wed, 31 Jul 2024 at 11:44, Satya Priya Kakitapalli (Temp) <quic_skakitap@quicinc.com> wrote: > > > On 7/27/2024 4:24 PM, Dmitry Baryshkov wrote: > > On Thu, Jul 25, 2024 at 05:03:11PM GMT, Satya Priya Kakitapalli wrote: > >> QUPv3 clocks support DFS, thus register the RCGs which require > >> support for DFS. > > From the commit message it is not clear if the patch fixes the issue > > (and thus should have Fixes and possibly cc:stable) or an improvement. > > > Actually its a fix, I'll add Fixes tag in next post. Together with the description of the actual issue it fixes, please. > > > >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > >> --- > >> drivers/clk/qcom/gcc-sc8180x.c | 350 ++++++++++++++++++++++++----------------- > >> 1 file changed, 210 insertions(+), 140 deletions(-) > >> > >
This series adds the DFS support for GCC QUPv3 RCGS and also adds the missing GPLL9 support and fixes the sdcc clocks frequency tables. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> --- Satya Priya Kakitapalli (4): clk: qcom: gcc-sc8180x: Register QUPv3 RCGs for DFS on sc8180x dt-bindings: clock: qcom: Add GPLL9 support on gcc-sc8180x clk: qcom: gcc-sc8180x: Add GPLL9 support clk: qcom: gcc-sc8180x: Fix the sdcc2 and sdcc4 clocks freq table drivers/clk/qcom/gcc-sc8180x.c | 375 +++++++++++++++++---------- include/dt-bindings/clock/qcom,gcc-sc8180x.h | 1 + 2 files changed, 232 insertions(+), 144 deletions(-) --- base-commit: 864b1099d16fc7e332c3ad7823058c65f890486c change-id: 20240725-gcc-sc8180x-fixes-cf58908142b5 Best regards,