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[0/2] arm64: dts: allwinner: H616: Add LRADC

Message ID 20240422164511.2488261-1-andre.przywara@arm.com
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Series arm64: dts: allwinner: H616: Add LRADC | expand

Message

Andre Przywara April 22, 2024, 4:45 p.m. UTC
From: James McGregor <jamcgregor@protonmail.com>

The Allwinner H616 series of SoCs have a low-rate ADC (LRADC) with
6-bit resolution and one input channel. They're compatible with the
existing drivers, so it only needs to be enabled in the DT.

Add an LRADC node to the H616 .dtsi, so board DTs can use them by
adding 'status = "okay";'.

This was tested on an OrangePi Zero 2W by attaching an expansion board
with two key buttons connected to the LRADC, and adding them to the DT.
/dev/input/event0 then properly reported the button presses. The patches
are based off sunxi/for-next.

James McGregor (2):
  dt-bindings: input: sum4i-lradc-keys: Add H616 compatible
  ARM: dts: sun50i: Add LRADC node

 .../bindings/input/allwinner,sun4i-a10-lradc-keys.yaml |  4 +++-
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi         | 10 ++++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

Comments

Andre Przywara April 23, 2024, 10:11 a.m. UTC | #1
On Mon, 22 Apr 2024 17:45:11 +0100
Andre Przywara <andre.przywara@arm.com> wrote:

Hi,

> From: James McGregor <jamcgregor@protonmail.com>
> 
> Add a DT node for the Allwinner H616 LRADC describing the base address,
> interrupt, reset and clock gates.
> 
> Signed-off-by: James McGregor <jamcgregor@protonmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> index a061b69c07c2..58fb28f83feb 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> @@ -125,6 +125,16 @@ sram_c: sram@28000 {
>  			};
>  		};
>  
> +		lradc: lradc@5070800 {

The nodes under the /soc node are ordered by their MMIO address, so this
needs to be moved down, after the THS node.

> +			compatible = "allwinner,sun50i-h616-lradc",
> +				     "allwinner,sun50i-r329-lradc";
> +			reg = <0x05070800 0x400>;
> +			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_KEYADC>;
> +			resets = <&ccu RST_BUS_KEYADC>;

Compared against the manual, and can confirm the MMIO base address,
clock, reset and IRQ number.
Also the IP descriptions looks the same as in the R329 manual.

So with the node moved around:

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> +			status = "disabled";
> +		};
> +
>  		ccu: clock@3001000 {
>  			compatible = "allwinner,sun50i-h616-ccu";
>  			reg = <0x03001000 0x1000>;