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([82.78.167.38]) by smtp.gmail.com with ESMTPSA id v23-20020a1709067d9700b00a42ee62b634sm8200648ejo.106.2024.03.07.06.07.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Mar 2024 06:07:44 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 00/10] clk: renesas: rzg2l: Add support for power domains Date: Thu, 7 Mar 2024 16:07:18 +0200 Message-Id: <20240307140728.190184-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Hi, Series adds support for power domains on rzg2l driver. RZ/G2L kind of devices support a functionality called MSTOP (module stop/standby). According to hardware manual the module could be switch to standby after its clocks are disabled. The reverse order of operation should be done when enabling a module (get the module out of standby, enable its clocks etc). In [1] the MSTOP settings were implemented by adding code in driver to attach the MSTOP state to the IP clocks. But it has been proposed to implement it as power domain. The result is this series. Along with MSTOP functionality there is also module power down functionality (which is currently available only on RZ/G3S). This has been also implemented through power domains. The DT bindings were updated with power domain IDs (plain integers that matches the DT with driver data structures). The current DT bindings were updated with module IDs for the modules listed in tables with name "Registers for Module Standby Mode" (see HW manual) exception being RZ/G3S where, due to the power down functionality, the DDR, TZCDDR, OTFDE_DDR were also added, to avoid system being blocked due to the following lines of code from patch 7/17. + /* Prepare for power down the BUSes in power down mode. */ + if (info->pm_domain_pwrdn_mstop) + writel(CPG_PWRDN_MSTOP_ENABLE, priv->base + CPG_PWRDN_MSTOP); Domain IDs were added to all SoC specific bindings. Thank you, Claudiu Beznea Changes in v2: - addressed review comments - dropped: - dt-bindings: clock: r9a09g011-cpg: Add always-on power domain IDs - clk: renesas: r9a07g043: Add initial support for power domains - clk: renesas: r9a07g044: Add initial support for power domains - clk: renesas: r9a09g011: Add initial support for power domains - clk: renesas: r9a09g011: Add initial support for power domains - arm64: dts: renesas: r9a07g043: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a07g044: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a07g054: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a09g011: Update #power-domain-cells = <1> as suggested in the review process - dropped "arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags" patch as it was integrated - added suspend to RAM support - collected tag [1] https://lore.kernel.org/all/20231120070024.4079344-4-claudiu.beznea.uj@bp.renesas.com/ Claudiu Beznea (10): dt-bindings: clock: r9a07g043-cpg: Add power domain IDs dt-bindings: clock: r9a07g044-cpg: Add power domain IDs dt-bindings: clock: r9a07g054-cpg: Add power domain IDs dt-bindings: clock: r9a08g045-cpg: Add power domain IDs dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S clk: renesas: rzg2l: Extend power domain support clk: renesas: r9a08g045: Add support for power domains clk: renesas: rzg2l-cpg: Add suspend/resume support for power domains clk: renesas: r9a08g045: Add the RZG2L_PD_F_CONSOLE flag to scif0 PM domain arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1> .../bindings/clock/renesas,rzg2l-cpg.yaml | 18 +- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 20 +- drivers/clk/renesas/r9a08g045-cpg.c | 61 ++++ drivers/clk/renesas/rzg2l-cpg.c | 267 +++++++++++++++++- drivers/clk/renesas/rzg2l-cpg.h | 78 +++++ include/dt-bindings/clock/r9a07g043-cpg.h | 52 ++++ include/dt-bindings/clock/r9a07g044-cpg.h | 58 ++++ include/dt-bindings/clock/r9a07g054-cpg.h | 58 ++++ include/dt-bindings/clock/r9a08g045-cpg.h | 70 +++++ 9 files changed, 658 insertions(+), 24 deletions(-) Reviewed-by: Geert Uytterhoeven Reviewed-by: Geert Uytterhoeven Reviewed-by: Geert Uytterhoeven